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Tue, 19 Nov 2019 22:47:42 -0800 Received: from xsj-pvapsmtp01 (smtp.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id xAK6lbBg001807; Tue, 19 Nov 2019 22:47:38 -0800 Received: from [172.23.64.106] (helo=xhdvnc125.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1iXJm5-00049G-Mr; Tue, 19 Nov 2019 22:47:37 -0800 Received: by xhdvnc125.xilinx.com (Postfix, from userid 16987) id 0170D12139A; Wed, 20 Nov 2019 12:17:35 +0530 (IST) From: Manish Narani To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, adrian.hunter@intel.com, michal.simek@xilinx.com, jolly.shah@xilinx.com, rajan.vaja@xilinx.com, nava.manne@xilinx.com, mdf@kernel.org, manish.narani@xilinx.com Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, git@xilinx.com Subject: [PATCH v6 7/8] dt-bindings: mmc: arasan: Document 'xlnx,zynqmp-8.9a' controller Date: Wed, 20 Nov 2019 12:17:28 +0530 Message-Id: <1574232449-13570-8-git-send-email-manish.narani@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1574232449-13570-1-git-send-email-manish.narani@xilinx.com> References: <1574232449-13570-1-git-send-email-manish.narani@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(376002)(39860400002)(136003)(346002)(396003)(189003)(199004)(36386004)(48376002)(47776003)(476003)(50466002)(6266002)(107886003)(2616005)(6666004)(356004)(446003)(426003)(11346002)(336012)(106002)(70206006)(26005)(8676002)(50226002)(186003)(70586007)(51416003)(81156014)(81166006)(76176011)(8936002)(2906002)(478600001)(305945005)(5660300002)(126002)(316002)(4326008)(44832011)(486006)(16586007)(103686004)(36756003)(42186006)(921003)(142933001)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:BN6PR02MB2802;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;MX:1;A:1; MIME-Version: 1.0 Content-Type: text/plain X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9224fe54-a85d-4d7e-6444-08d76d858e5f X-MS-TrafficTypeDiagnostic: BN6PR02MB2802: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-Forefront-PRVS: 02272225C5 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jSESfp3vp4nwXOBXS4w1zRkWtsJFVUGmEV67VioL8BnowVufoRP/8/KmuH2TG2bS6n10pCGJP2KopHVNLUXfIlQOzWz9RSvXL+g6PJVNV+WlgIgaBBh04RitdVworiLC0rHstwaT6yS88hU1ip4Y8czxVlsVPe4b870CZN3SdMkfOJREThuEscKZ640rJmn7oIw2kGZg0b+O7LLeVknD0DfpRqUABXYWR82B7KVifzDmPfOKLzscz8feaYqDOBfNuDjBX/bkcciQFJnjBrcdJoGl2BbbG7j2cwfI3l9YjP5g42TrkEvV3UweDVSleQfQdsFqfGE9l2Ipwwg1ThLo7eHDz6P68FFxQYdUi0zVZNPUCW6gvhx9nFBesXsEpq6So16hvEHUH3l7YQJf8UkguRFFsQjGl7vTuTNrkg2JHMoxPDb5haCDM4cO+Ep1hgcz X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2019 06:47:48.1617 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9224fe54-a85d-4d7e-6444-08d76d858e5f X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR02MB2802 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add documentation for 'xlnx,zynqmp-8.9a' SDHCI controller and optional properties followed by example. Signed-off-by: Manish Narani Reviewed-by: Rob Herring --- .../devicetree/bindings/mmc/arasan,sdhci.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index b51e40b2e0c5..5ad804a870e4 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -15,6 +15,9 @@ Required Properties: - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY + For this device it is strongly suggested to include clock-output-names and + #clock-cells. - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY Note: This binding has been deprecated and moved to [5]. - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY @@ -47,6 +50,10 @@ Optional Properties: - xlnx,int-clock-stable-broken: when present, the controller always reports that the internal clock is stable even when it is not. + - xlnx,mio-bank: When specified, this will indicate the MIO bank number in + which the command and data lines are configured. If not specified, driver + will assume this as 0. + Example: sdhci@e0100000 { compatible = "arasan,sdhci-8.9a"; @@ -83,6 +90,18 @@ Example: #clock-cells = <0>; }; + sdhci: mmc@ff160000 { + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + interrupt-parent = <&gic>; + interrupts = <0 48 4>; + reg = <0x0 0xff160000 0x0 0x1000>; + clocks = <&clk200>, <&clk200>; + clock-names = "clk_xin", "clk_ahb"; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; + #clock-cells = <1>; + clk-phase-sd-hs = <63>, <72>; + }; + emmc: sdhci@ec700000 { compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1"; reg = <0xec700000 0x300>; -- 2.17.1