From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFF0DC43603 for ; Thu, 5 Dec 2019 17:15:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AB6B324249 for ; Thu, 5 Dec 2019 17:15:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730100AbfLERPg (ORCPT ); Thu, 5 Dec 2019 12:15:36 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:38310 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729450AbfLERPf (ORCPT ); Thu, 5 Dec 2019 12:15:35 -0500 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xB5H7pWV064799; Thu, 5 Dec 2019 12:15:16 -0500 Received: from ppma03dal.us.ibm.com (b.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.11]) by mx0a-001b2d01.pphosted.com with ESMTP id 2wq14kr5e7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 05 Dec 2019 12:15:15 -0500 Received: from pps.filterd (ppma03dal.us.ibm.com [127.0.0.1]) by ppma03dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id xB5HAIYb032681; Thu, 5 Dec 2019 17:15:15 GMT Received: from b03cxnp07029.gho.boulder.ibm.com (b03cxnp07029.gho.boulder.ibm.com [9.17.130.16]) by ppma03dal.us.ibm.com with ESMTP id 2wkg27mku0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 05 Dec 2019 17:15:14 +0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id xB5HFDeL32244076 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 5 Dec 2019 17:15:13 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B3AC96E053; Thu, 5 Dec 2019 17:15:13 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 04F8B6E050; Thu, 5 Dec 2019 17:15:12 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.103.158]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP; Thu, 5 Dec 2019 17:15:12 +0000 (GMT) From: Eddie James To: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, jason@lakedaemon.net, linux-aspeed@lists.ozlabs.org, maz@kernel.org, robh+dt@kernel.org, tglx@linutronix.de, mark.rutland@arm.com, joel@jms.id.au, andrew@aj.id.au Subject: [PATCH v2 00/12] Aspeed: Add SCU interrupt controller and XDMA engine drivers Date: Thu, 5 Dec 2019 11:15:00 -0600 Message-Id: <1575566112-11658-1-git-send-email-eajames@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-12-05_05:2019-12-04,2019-12-05 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 phishscore=0 mlxscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 suspectscore=1 adultscore=0 mlxlogscore=552 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1912050144 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series first adds a driver to control the interrupt controller provided by the System Control Unit (SCU) on the AST2500 and AST2600 SOCs. The interrupts made available are necessary for the control of the XDMA engine embedded in the same Aspeed SOCs. This series then adds a driver to control the XDMA engine. This driver was previously sent to the list without support for the AST2600, and has been refactored significantly to enable that support. The XDMA engine performs automatic DMA operations between the Aspeed SOC (acting as a BMC) and a host processor. Changes since v1: - See individual patches - In summary, first the irqchip driver switched to use the parent SCU regmap rather than iomapping it's register. Secondly, the XDMA initialization switched to use properties from the device tree rather than dynamically calculate memory spaces, and system config. Eddie James (12): dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller irqchip: Add Aspeed SCU interrupt controller ARM: dts: aspeed: ast2500: Add SCU interrupt controller ARM: dts: aspeed: ast2600: Add SCU interrupt controllers dt-bindings: soc: Add Aspeed XDMA Engine drivers/soc: Add Aspeed XDMA Engine Driver drivers/soc: xdma: Add user interface ARM: dts: aspeed: ast2500: Add XDMA Engine ARM: dts: aspeed: ast2600: Add XDMA Engine ARM: dts: aspeed: witherspoon: Enable XDMA Engine ARM: dts: aspeed: rainier: Enable XDMA engine ARM: dts: aspeed: tacoma: Enable XDMA engine .../interrupt-controller/aspeed,ast2xxx-scu-ic.txt | 23 + .../devicetree/bindings/soc/aspeed/xdma.txt | 43 + MAINTAINERS | 16 + arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 5 + arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 5 + arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 5 + arch/arm/boot/dts/aspeed-g5.dtsi | 25 +- arch/arm/boot/dts/aspeed-g6.dtsi | 33 + drivers/irqchip/Makefile | 2 +- drivers/irqchip/irq-aspeed-scu-ic.c | 239 +++++ drivers/soc/aspeed/Kconfig | 8 + drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-xdma.c | 1007 ++++++++++++++++++++ .../interrupt-controller/aspeed-scu-ic.h | 23 + include/uapi/linux/aspeed-xdma.h | 41 + 15 files changed, 1473 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.txt create mode 100644 drivers/irqchip/irq-aspeed-scu-ic.c create mode 100644 drivers/soc/aspeed/aspeed-xdma.c create mode 100644 include/dt-bindings/interrupt-controller/aspeed-scu-ic.h create mode 100644 include/uapi/linux/aspeed-xdma.h -- 1.8.3.1