From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B161C2D0DB for ; Fri, 24 Jan 2020 14:39:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 774F8206F0 for ; Fri, 24 Jan 2020 14:39:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389125AbgAXOjO (ORCPT ); Fri, 24 Jan 2020 09:39:14 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:9676 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388997AbgAXOjH (ORCPT ); Fri, 24 Jan 2020 09:39:07 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 60679D70EC9CD3104DCB; Fri, 24 Jan 2020 22:39:03 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 24 Jan 2020 22:38:55 +0800 From: John Garry To: , , , , , , , , CC: , , , , , , , John Garry Subject: [PATCH RFC 7/7] perf vendor events arm64: Add hip08 SMMUv3 PMCG IMP DEF events Date: Fri, 24 Jan 2020 22:35:05 +0800 Message-ID: <1579876505-113251-8-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1579876505-113251-1-git-send-email-john.garry@huawei.com> References: <1579876505-113251-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the SMMUv3 PMCG (Performance Monitor Event Group) implementation defined events for hip08 platform. Only a single event is added, but this is just an example for now. Signed-off-by: John Garry --- .../arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json | 9 +++++++++ tools/perf/pmu-events/jevents.c | 2 ++ 2 files changed, 11 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json new file mode 100644 index 000000000000..ff2414a5ebc4 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json @@ -0,0 +1,9 @@ +[ + { + "EventCode": "0x8a", + "EventName": "smmuv3_pmcg.l1_tlb", + "BriefDescription": "SMMUv3 PMCG l1_tlb", + "PublicDescription": "SMMUv3 PMCG l1_tlb", + "Unit": "smmuv3_pmcg" + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index da6430c0d184..01541825a6c7 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -239,6 +239,8 @@ static struct map { { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, { "hisi_sccl,hha", "hisi_sccl,hha" }, { "hisi_sccl,l3c", "hisi_sccl,l3c" }, + /* it's not realistic to keep adding these, we need something more scalable ... */ + { "smmuv3_pmcg", "smmuv3_pmcg" }, { "L3PMC", "amd_l3" }, {} }; -- 2.17.1