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From: Can Guo <cang@codeaurora.org>
To: asutoshd@codeaurora.org, nguyenb@codeaurora.org,
	hongwus@codeaurora.org, rnayak@codeaurora.org,
	linux-scsi@vger.kernel.org, kernel-team@android.com,
	saravanak@google.com, salyzyn@google.com, cang@codeaurora.org
Cc: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Avri Altman <avri.altman@wdc.com>,
	"James E.J. Bottomley" <jejb@linux.ibm.com>,
	"Martin K. Petersen" <martin.petersen@oracle.com>,
	linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT),
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v9 7/7] scsi: ufs-qcom: Delay specific time before gate ref clk
Date: Mon, 10 Feb 2020 18:37:49 -0800	[thread overview]
Message-ID: <1581388671-18078-8-git-send-email-cang@codeaurora.org> (raw)
In-Reply-To: <1581388671-18078-1-git-send-email-cang@codeaurora.org>

After enter hibern8, as UFS JEDEC ver 3.0 requires, a specific gating wait
time is required before disable the device reference clock. If it is not
specified, use the old delay.

Signed-off-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Reviewed-by: Hongwu Su <hongwus@codeaurora.org>
---
 drivers/scsi/ufs/ufs-qcom.c | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
index ded08fb..ae995f0 100644
--- a/drivers/scsi/ufs/ufs-qcom.c
+++ b/drivers/scsi/ufs/ufs-qcom.c
@@ -845,11 +845,27 @@ static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_qcom_host *host, bool enable)
 		/*
 		 * If we are here to disable this clock it might be immediately
 		 * after entering into hibern8 in which case we need to make
-		 * sure that device ref_clk is active at least 1us after the
+		 * sure that device ref_clk is active for specific time after
 		 * hibern8 enter.
 		 */
-		if (!enable)
-			udelay(1);
+		if (!enable) {
+			unsigned long gating_wait;
+
+			gating_wait = host->hba->dev_info.clk_gating_wait_us;
+			if (!gating_wait) {
+				udelay(1);
+			} else {
+				/*
+				 * bRefClkGatingWaitTime defines the minimum
+				 * time for which the reference clock is
+				 * required by device during transition from
+				 * HS-MODE to LS-MODE or HIBERN8 state. Give it
+				 * more delay to be on the safe side.
+				 */
+				gating_wait += 10;
+				usleep_range(gating_wait, gating_wait + 10);
+			}
+		}
 
 		writel_relaxed(temp, host->dev_ref_clk_ctrl_mmio);
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

      parent reply	other threads:[~2020-02-11  2:38 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1581388671-18078-1-git-send-email-cang@codeaurora.org>
2020-02-11  2:37 ` [PATCH v9 1/7] scsi: ufs: Flush exception event before suspend Can Guo
2020-02-11  2:37 ` [PATCH v9 2/7] scsi: ufs: set load before setting voltage in regulators Can Guo
2020-02-11  2:37 ` [PATCH v9 3/7] scsi: ufs-qcom: Adjust bus bandwidth voting and unvoting Can Guo
2020-02-11  3:09   ` hongwus
2020-02-11  3:13     ` Can Guo
2020-02-11  2:37 ` [PATCH v9 4/7] scsi: ufs: Remove the check before call setup clock notify vops Can Guo
2020-02-11  2:37 ` [PATCH v9 5/7] scsi: ufs: Fix ufshcd_hold() caused scheduling while atomic Can Guo
2020-02-11  2:37 ` [PATCH v9 6/7] scsi: ufs: Add dev ref clock gating wait time support Can Guo
2020-02-11  2:37 ` Can Guo [this message]

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