From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44011C18E5B for ; Tue, 24 Mar 2020 22:33:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 219BC2078A for ; Tue, 24 Mar 2020 22:33:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728697AbgCXWdu (ORCPT ); Tue, 24 Mar 2020 18:33:50 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:46366 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728282AbgCXWcU (ORCPT ); Tue, 24 Mar 2020 18:32:20 -0400 Received: from [5.158.153.53] (helo=tip-bot2.lab.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1jGs5n-0006ru-BH; Tue, 24 Mar 2020 23:32:15 +0100 Received: from [127.0.1.1] (localhost [IPv6:::1]) by tip-bot2.lab.linutronix.de (Postfix) with ESMTP id F2C291C0470; Tue, 24 Mar 2020 23:32:14 +0100 (CET) Date: Tue, 24 Mar 2020 22:32:14 -0000 From: "tip-bot2 for Thomas Gleixner" Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] ASoC: Intel: Convert to new X86 CPU match macros Cc: Thomas Gleixner , Borislav Petkov , "Greg Kroah-Hartman" , x86 , LKML In-Reply-To: <20200320131510.594671507@linutronix.de> References: <20200320131510.594671507@linutronix.de> MIME-Version: 1.0 Message-ID: <158508913467.28353.3796403748809636437.tip-bot2@tip-bot2> X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/cpu branch of tip: Commit-ID: d51ba9c6663d7171681be357f672503f4e2ccdc1 Gitweb: https://git.kernel.org/tip/d51ba9c6663d7171681be357f672503f4e2ccdc1 Author: Thomas Gleixner AuthorDate: Fri, 20 Mar 2020 14:14:04 +01:00 Committer: Borislav Petkov CommitterDate: Tue, 24 Mar 2020 21:35:53 +01:00 ASoC: Intel: Convert to new X86 CPU match macros The new macro set has a consistent namespace and uses C99 initializers instead of the grufty C89 ones. Get rid the of the local macro wrappers for consistency. Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov Reviewed-by: Greg Kroah-Hartman Link: https://lkml.kernel.org/r/20200320131510.594671507@linutronix.de --- sound/soc/intel/common/soc-intel-quirks.h | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/sound/soc/intel/common/soc-intel-quirks.h b/sound/soc/intel/common/soc-intel-quirks.h index 863a477..a917615 100644 --- a/sound/soc/intel/common/soc-intel-quirks.h +++ b/sound/soc/intel/common/soc-intel-quirks.h @@ -15,13 +15,11 @@ #include #include -#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } - #define SOC_INTEL_IS_CPU(soc, type) \ static inline bool soc_intel_is_##soc(void) \ { \ static const struct x86_cpu_id soc##_cpu_ids[] = { \ - ICPU(type), \ + X86_MATCH_INTEL_FAM6_MODEL(type, NULL), \ {} \ }; \ const struct x86_cpu_id *id; \ @@ -32,11 +30,11 @@ static inline bool soc_intel_is_##soc(void) \ return false; \ } -SOC_INTEL_IS_CPU(byt, INTEL_FAM6_ATOM_SILVERMONT); -SOC_INTEL_IS_CPU(cht, INTEL_FAM6_ATOM_AIRMONT); -SOC_INTEL_IS_CPU(apl, INTEL_FAM6_ATOM_GOLDMONT); -SOC_INTEL_IS_CPU(glk, INTEL_FAM6_ATOM_GOLDMONT_PLUS); -SOC_INTEL_IS_CPU(cml, INTEL_FAM6_KABYLAKE_L); +SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT); +SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT); +SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT); +SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS); +SOC_INTEL_IS_CPU(cml, KABYLAKE_L); static inline bool soc_intel_is_byt_cr(struct platform_device *pdev) {