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From: Fenghua Yu <fenghua.yu@intel.com>
To: "Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>, "H Peter Anvin" <hpa@zytor.com>,
	"David Woodhouse" <dwmw2@infradead.org>,
	"Lu Baolu" <baolu.lu@linux.intel.com>,
	"Dave Hansen" <dave.hansen@intel.com>,
	"Tony Luck" <tony.luck@intel.com>,
	"Ashok Raj" <ashok.raj@intel.com>,
	"Jacob Jun Pan" <jacob.jun.pan@intel.com>,
	"Dave Jiang" <dave.jiang@intel.com>,
	"Sohil Mehta" <sohil.mehta@intel.com>,
	"Ravi V Shankar" <ravi.v.shankar@intel.com>
Cc: "linux-kernel" <linux-kernel@vger.kernel.org>,
	"x86" <x86@kernel.org>,
	iommu@lists.linux-foundation.org,
	Fenghua Yu <fenghua.yu@intel.com>
Subject: [PATCH 4/7] x86/msr-index: Define IA32_PASID MSR
Date: Mon, 30 Mar 2020 12:33:05 -0700	[thread overview]
Message-ID: <1585596788-193989-5-git-send-email-fenghua.yu@intel.com> (raw)
In-Reply-To: <1585596788-193989-1-git-send-email-fenghua.yu@intel.com>

The IA32_PASID MSR (0xd93) contains the Process Address Space Identifier
(PASID), a 20-bit value. Bit 31 must be set to indicate the value
programmed in the MSR is valid. Hardware uses PASID to identify which
process submits the work and direct responses to the right process.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
---
 arch/x86/include/asm/msr-index.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index d5e517d1c3dd..ebda24839dc5 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -224,6 +224,9 @@
 #define MSR_IA32_LASTINTFROMIP		0x000001dd
 #define MSR_IA32_LASTINTTOIP		0x000001de
 
+#define MSR_IA32_PASID			0x00000d93
+#define MSR_IA32_PASID_VALID		BIT_ULL(31)
+
 /* DEBUGCTLMSR bits (others vary by model): */
 #define DEBUGCTLMSR_LBR			(1UL <<  0) /* last branch recording */
 #define DEBUGCTLMSR_BTF_SHIFT		1
-- 
2.19.1


  parent reply	other threads:[~2020-03-30 20:38 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-30 19:33 [PATCH 0/7] x86: tag application address space for devices Fenghua Yu
2020-03-30 19:33 ` [PATCH 1/7] docs: x86: Add a documentation for ENQCMD Fenghua Yu
2020-04-26 11:02   ` Thomas Gleixner
2020-04-27 20:13     ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 2/7] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions Fenghua Yu
2020-04-26 11:06   ` Thomas Gleixner
2020-04-27 20:17     ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 3/7] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature Fenghua Yu
2020-04-26 11:17   ` Thomas Gleixner
2020-04-27 20:33     ` Fenghua Yu
2020-03-30 19:33 ` Fenghua Yu [this message]
2020-04-26 11:22   ` [PATCH 4/7] x86/msr-index: Define IA32_PASID MSR Thomas Gleixner
2020-04-27 20:50     ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 5/7] x86/mmu: Allocate/free PASID Fenghua Yu
2020-04-26 14:55   ` Thomas Gleixner
2020-04-27 22:18     ` Fenghua Yu
2020-04-27 23:44       ` Thomas Gleixner
2020-04-28 18:21     ` Jacob Pan (Jun)
2020-04-28 18:54       ` Thomas Gleixner
2020-04-28 19:07         ` Luck, Tony
2020-04-28 20:42           ` Jacob Pan (Jun)
2020-04-28 20:59             ` Luck, Tony
2020-04-28 22:13               ` Jacob Pan (Jun)
2020-04-28 22:32                 ` Luck, Tony
2020-04-28 20:40         ` Jacob Pan (Jun)
2020-04-28 20:57     ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 6/7] x86/traps: Fix up invalid PASID Fenghua Yu
2020-04-26 15:25   ` Thomas Gleixner
2020-04-27 20:11     ` Fenghua Yu
2020-04-28  0:13       ` Thomas Gleixner
2020-04-27 22:46     ` Raj, Ashok
2020-04-27 23:08       ` Luck, Tony
2020-04-28  0:20         ` Thomas Gleixner
2020-04-28  0:54       ` Thomas Gleixner
2020-04-28  1:08         ` Raj, Ashok
2020-03-30 19:33 ` [PATCH 7/7] x86/process: Clear PASID state for a newly forked/cloned thread Fenghua Yu
2020-04-22 20:41 ` [PATCH 0/7] x86: tag application address space for devices Fenghua Yu

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