From: Sharat Masetty <smasetty@codeaurora.org>
To: freedreno@lists.freedesktop.org, devicetree@vger.kernel.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, jcrouse@codeaurora.org,
mka@chromium.org, sibis@codeaurora.org, saravanak@google.com,
viresh.kumar@linaro.org, Sharat Masetty <smasetty@codeaurora.org>
Subject: [PATCH 0/5] Add support for GPU DDR BW scaling
Date: Tue, 31 Mar 2020 13:25:48 +0530 [thread overview]
Message-ID: <1585641353-23229-1-git-send-email-smasetty@codeaurora.org> (raw)
This series adds support for GPU DDR bandwidth scaling and is based on the
bindings from Sarvana[1]. This work is based on Sibi's work for CPU side [2]
which also lists all the needed dependencies to get this series working.
My workspace is based on a chrome tag [3]. Although the bindings add support
for both peak and average bandwidth votes, I have only added support for peak
bandwidth votes.
[1]: https://patchwork.kernel.org/cover/11277199/
[2]: https://patchwork.kernel.org/cover/11353185/ (this lists further dependencies)
[3]: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2097039/3
Sharat Masetty (5):
arm64: dts: qcom: sc7180: Add interconnect bindings for GPU
arm64: dts: qcom: sc7180: Add GPU DDR BW opp table
drm: msm: scale DDR BW along with GPU frequency
drm: msm: a6xx: Fix off by one error when setting GPU freq
dt-bindings: drm/msm/gpu: Document OPP phandle list for the GPU
.../devicetree/bindings/display/msm/gpu.txt | 63 +++++++++++++++++++++-
arch/arm64/boot/dts/qcom/sc7180.dtsi | 52 +++++++++++++++++-
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 43 ++++++++++++---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 44 +++++++++++++--
drivers/gpu/drm/msm/msm_gpu.h | 9 ++++
5 files changed, 197 insertions(+), 14 deletions(-)
--
2.7.4
next reply other threads:[~2020-03-31 7:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-31 7:55 Sharat Masetty [this message]
2020-03-31 7:55 ` [PATCH 1/5] arm64: dts: qcom: sc7180: Add interconnect bindings for GPU Sharat Masetty
2020-03-31 7:55 ` [PATCH 2/5] arm64: dts: qcom: sc7180: Add GPU DDR BW opp table Sharat Masetty
2020-03-31 7:55 ` [PATCH 3/5] drm: msm: scale DDR BW along with GPU frequency Sharat Masetty
2020-03-31 17:26 ` Jordan Crouse
2020-04-01 12:30 ` Sharat Masetty
2020-03-31 7:55 ` [PATCH 4/5] drm: msm: a6xx: Fix off by one error when setting GPU freq Sharat Masetty
2020-03-31 16:43 ` Jordan Crouse
2020-03-31 7:55 ` [PATCH 5/5] dt-bindings: drm/msm/gpu: Document OPP phandle list for the GPU Sharat Masetty
2020-04-10 17:48 ` Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1585641353-23229-1-git-send-email-smasetty@codeaurora.org \
--to=smasetty@codeaurora.org \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@freedesktop.org \
--cc=freedreno@lists.freedesktop.org \
--cc=jcrouse@codeaurora.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mka@chromium.org \
--cc=saravanak@google.com \
--cc=sibis@codeaurora.org \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).