From: Wesley Cheng <wcheng@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
vinod.koul@linaro.org, Wesley Cheng <wcheng@codeaurora.org>
Subject: [PATCH v3 4/4] phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB
Date: Tue, 7 Apr 2020 15:23:29 -0700 [thread overview]
Message-ID: <1586298209-4589-5-git-send-email-wcheng@codeaurora.org> (raw)
In-Reply-To: <1586298209-4589-1-git-send-email-wcheng@codeaurora.org>
The register map for SM8150 QMP USB SSPHY has moved
QPHY_POWER_DOWN_CONTROL to a different offset. Allow for
an offset in the register table to override default value
if it is a DP capable PHY.
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index cc04471..71a230a 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -164,6 +164,7 @@ enum qphy_reg_layout {
[QPHY_SW_RESET] = 0x00,
[QPHY_START_CTRL] = 0x44,
[QPHY_PCS_STATUS] = 0x14,
+ [QPHY_COM_POWER_DOWN_CONTROL] = 0x40,
};
static const unsigned int sdm845_ufsphy_regs_layout[] = {
@@ -1627,6 +1628,9 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
if (cfg->has_phy_com_ctrl)
qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
SW_PWRDN);
+ else if (!cfg->has_phy_com_ctrl && cfg->regs[QPHY_COM_POWER_DOWN_CONTROL])
+ qphy_setbits(pcs, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
+ cfg->pwrdn_ctrl);
else
qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-04-07 22:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-07 22:23 [PATCH v3 0/4] Add SS/HS-USB changes for Qualcomm SM8150 chipset Wesley Cheng
2020-04-07 22:23 ` [PATCH v3 1/4] dt-bindings: phy: Add binding for qcom,usb-hs-7nm Wesley Cheng
2020-04-11 2:13 ` Stephen Boyd
2020-04-11 3:56 ` Wesley Cheng
2020-04-07 22:23 ` [PATCH v3 2/4] phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs Wesley Cheng
2020-04-11 2:18 ` Stephen Boyd
2020-04-11 4:13 ` Wesley Cheng
2020-04-07 22:23 ` [PATCH v3 3/4] phy: qcom-qmp: Add SM8150 QMP USB3 PHY support Wesley Cheng
2020-04-07 22:23 ` Wesley Cheng [this message]
2020-04-07 22:29 ` [PATCH v3 0/4] Add SS/HS-USB changes for Qualcomm SM8150 chipset Wesley Cheng
-- strict thread matches above, loose matches on Subject: below --
2020-03-25 17:43 Wesley Cheng
2020-03-25 17:43 ` [PATCH v3 4/4] phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB Wesley Cheng
2020-03-27 0:32 ` Wesley Cheng
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