From: Jolly Shah <jolly.shah@xilinx.com>
To: ard.biesheuvel@linaro.org, mingo@kernel.org,
gregkh@linuxfoundation.org, matt@codeblueprint.co.uk,
sudeep.holla@arm.com, hkallweit1@gmail.com,
keescook@chromium.org, dmitry.torokhov@gmail.com,
michal.simek@xilinx.com
Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>,
Tejas Patel <tejas.patel@xilinx.com>,
Jolly Shah <jolly.shah@xilinx.com>
Subject: [PATCH v5 25/25] firmware: xilinx: Add sysfs and API to set boot health status
Date: Fri, 24 Apr 2020 13:58:07 -0700 [thread overview]
Message-ID: <1587761887-4279-26-git-send-email-jolly.shah@xilinx.com> (raw)
In-Reply-To: <1587761887-4279-1-git-send-email-jolly.shah@xilinx.com>
From: Rajan Vaja <rajan.vaja@xilinx.com>
Add sysfs interface to set boot health status from user space.
Add API used by this interface to communicate with firmware.
If PMUFW is compiled with CHECK_HEALTHY_BOOT, it will check the
healthy bit on FPD WDT expiration. If healthy bit is set by a user
application running in Linux, PMUFW will do APU only restart. If
healthy bit is not set during FPD WDT expiration, PMUFW will do
system restart.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
---
.../ABI/stable/sysfs-driver-firmware-zynqmp | 21 ++++++++++++
drivers/firmware/xilinx/zynqmp.c | 39 ++++++++++++++++++++++
include/linux/firmware/xlnx-zynqmp.h | 7 ++++
3 files changed, 67 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp
index 554f30c..00fa04c 100644
--- a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp
+++ b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp
@@ -80,3 +80,24 @@ Description:
# echo "subsystem" > /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope
Users: Xilinx
+
+What: /sys/devices/platform/firmware\:zynqmp-firmware/health_status
+Date: March 2020
+KernelVersion: 5.6
+Contact: "Jolly Shah" <jollys@xilinx.com>
+Description:
+ This sysfs interface allows to set the health status. If PMUFW
+ is compiled with CHECK_HEALTHY_BOOT, it will check the healthy
+ bit on FPD WDT expiration. If healthy bit is set by a user
+ application running in Linux, PMUFW will do APU only restart. If
+ healthy bit is not set during FPD WDT expiration, PMUFW will do
+ system restart.
+
+ Usage:
+ Set healthy bit
+ # echo 1 > /sys/devices/platform/firmware\:zynqmp-firmware/health_status
+
+ Unset healthy bit
+ # echo 0 > /sys/devices/platform/firmware\:zynqmp-firmware/health_status
+
+Users: Xilinx
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 8d36618..bfaf29a 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -684,6 +684,21 @@ int zynqmp_pm_read_pggs(u32 index, u32 *value)
EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
/**
+ * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
+ * @value Status value to be written
+ *
+ * This function sets healthy bit value to indicate boot health status
+ * to firmware.
+ *
+ * @return Returns status, either success or error+reason
+ */
+int zynqmp_pm_set_boot_health_status(u32 value)
+{
+ return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
+ value, 0, NULL);
+}
+
+/**
* zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
* @reset: Reset to be configured
* @assert_flag: Flag stating should reset be asserted (1) or
@@ -984,6 +999,29 @@ static ssize_t shutdown_scope_store(struct device *device,
static DEVICE_ATTR_RW(shutdown_scope);
+static ssize_t health_status_store(struct device *device,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ int ret;
+ unsigned int value;
+
+ ret = kstrtouint(buf, 10, &value);
+ if (ret)
+ return ret;
+
+ ret = zynqmp_pm_set_boot_health_status(value);
+ if (ret) {
+ dev_err(device, "unable to set healthy bit value to %u\n",
+ value);
+ return ret;
+ }
+
+ return count;
+}
+
+static DEVICE_ATTR_WO(health_status);
+
static ssize_t ggs_show(struct device *device,
struct device_attribute *attr,
char *buf,
@@ -1143,6 +1181,7 @@ static struct attribute *zynqmp_firmware_attrs[] = {
&dev_attr_pggs2.attr,
&dev_attr_pggs3.attr,
&dev_attr_shutdown_scope.attr,
+ &dev_attr_health_status.attr,
NULL,
};
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index c297333..5968df8 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -114,6 +114,8 @@ enum pm_ioctl_id {
IOCTL_READ_GGS = 13,
IOCTL_WRITE_PGGS = 14,
IOCTL_READ_PGGS = 15,
+ /* Set healthy bit value */
+ IOCTL_SET_BOOT_HEALTH_STATUS = 17,
};
enum pm_query_id {
@@ -354,6 +356,7 @@ int zynqmp_pm_read_ggs(u32 index, u32 *value);
int zynqmp_pm_write_pggs(u32 index, u32 value);
int zynqmp_pm_read_pggs(u32 index, u32 *value);
int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype);
+int zynqmp_pm_set_boot_health_status(u32 value);
#else
static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
{
@@ -500,6 +503,10 @@ static inline int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
{
return -ENODEV;
}
+static inline int zynqmp_pm_set_boot_health_status(u32 value)
+{
+ return -ENODEV;
+}
#endif
#endif /* __FIRMWARE_ZYNQMP_H__ */
--
2.7.4
prev parent reply other threads:[~2020-04-24 20:59 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-24 20:57 [PATCH v5 00/25] firmware: xilinx: Add xilinx specific sysfs interface Jolly Shah
2020-04-24 20:57 ` [PATCH v5 01/25] firmware: xilinx: Remove eemi ops for get_api_version Jolly Shah
2020-04-24 20:57 ` [PATCH v5 02/25] firmware: xilinx: Remove eemi ops for get_chipid Jolly Shah
2020-04-24 20:57 ` [PATCH v5 03/25] firmware: xilinx: Remove eemi ops for query_data Jolly Shah
2020-04-24 20:57 ` [PATCH v5 04/25] firmware: xilinx: Remove eemi ops for clock_enable Jolly Shah
2020-04-24 20:57 ` [PATCH v5 05/25] firmware: xilinx: Remove eemi ops for clock_disable Jolly Shah
2020-04-24 20:57 ` [PATCH v5 06/25] firmware: xilinx: Remove eemi ops for clock_getstate Jolly Shah
2020-04-24 20:57 ` [PATCH v5 07/25] firmware: xilinx: Remove eemi ops for clock_setdivider Jolly Shah
2020-04-24 20:57 ` [PATCH v5 08/25] firmware: xilinx: Remove eemi ops for clock_getdivider Jolly Shah
2020-04-24 20:57 ` [PATCH v5 09/25] firmware: xilinx: Remove eemi ops for clock set/get rate Jolly Shah
2020-04-24 20:57 ` [PATCH v5 10/25] firmware: xilinx: Remove eemi ops for clock set/get parent Jolly Shah
2020-04-24 20:57 ` [PATCH v5 11/25] firmware: xilinx: Use APIs instead of IOCTLs Jolly Shah
2020-04-24 20:57 ` [PATCH v5 12/25] firmware: xilinx: Remove eemi ops for reset_assert Jolly Shah
2020-04-24 20:57 ` [PATCH v5 13/25] firmware: xilinx: Remove eemi ops for reset_get_status Jolly Shah
2020-04-24 20:57 ` [PATCH v5 14/25] firmware: xilinx: Remove eemi ops for init_finalize Jolly Shah
2020-04-24 20:57 ` [PATCH v5 15/25] firmware: xilinx: Remove eemi ops for set_suspend_mode Jolly Shah
2020-04-24 20:57 ` [PATCH v5 16/25] firmware: xilinx: Remove eemi ops for request_node Jolly Shah
2020-04-24 20:57 ` [PATCH v5 17/25] firmware: xilinx: Remove eemi ops for release_node Jolly Shah
2020-04-24 20:58 ` [PATCH v5 18/25] firmware: xilinx: Remove eemi ops for set_requirement Jolly Shah
2020-04-24 20:58 ` [PATCH v5 19/25] firmware: xilinx: Remove eemi ops for aes engine Jolly Shah
2020-04-24 20:58 ` [PATCH v5 20/25] firmware: xilinx: Remove eemi ops for fpga related APIs Jolly Shah
2020-04-24 20:58 ` [PATCH v5 21/25] firmware: xilinx: Add APIs to read/write GGS/PGGS registers Jolly Shah
2020-04-24 20:58 ` [PATCH v5 22/25] firmware: xilinx: Add sysfs interface Jolly Shah
2020-04-24 20:58 ` [PATCH v5 23/25] firmware: xilinx: Add system shutdown API interface Jolly Shah
2020-04-24 20:58 ` [PATCH v5 24/25] firmware: xilinx: Add sysfs to set shutdown scope Jolly Shah
2020-04-24 20:58 ` Jolly Shah [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1587761887-4279-26-git-send-email-jolly.shah@xilinx.com \
--to=jolly.shah@xilinx.com \
--cc=ard.biesheuvel@linaro.org \
--cc=dmitry.torokhov@gmail.com \
--cc=gregkh@linuxfoundation.org \
--cc=hkallweit1@gmail.com \
--cc=keescook@chromium.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=matt@codeblueprint.co.uk \
--cc=michal.simek@xilinx.com \
--cc=mingo@kernel.org \
--cc=rajan.vaja@xilinx.com \
--cc=rajanv@xilinx.com \
--cc=sudeep.holla@arm.com \
--cc=tejas.patel@xilinx.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).