From: dillon.minfei@gmail.com
To: mcoquelin.stm32@gmail.com, alexandre.torgue@st.com,
philippe.schenker@toradex.com
Cc: linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
dillon min <dillon.minfei@gmail.com>
Subject: [PATCH v3 4/4] i2c: stm32f4: Fix stmpe811 get xyz data timeout issue
Date: Fri, 8 May 2020 09:46:28 +0800 [thread overview]
Message-ID: <1588902388-4596-5-git-send-email-dillon.minfei@gmail.com> (raw)
In-Reply-To: <1588902388-4596-1-git-send-email-dillon.minfei@gmail.com>
From: dillon min <dillon.minfei@gmail.com>
as stm32f429's internal flash is 2Mbytes and compiled kernel
image bigger than 2Mbytes, so we have to load kernel image
to sdram on stm32f429-disco board which has 8Mbytes sdram space.
based on above context, as you knows kernel running on external
sdram is more slower than internal flash. besides, we need read 4
bytes to get touch screen xyz(x, y, pressure) coordinate data in
stmpe811 interrupt.
so, in stm32f4_i2c_handle_rx_done, as i2c read slower than running
in xip mode, have to adjust 'STOP/START bit set position' from last two
bytes to last one bytes. else, will get i2c timeout in reading
touch screen coordinate.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
---
drivers/i2c/busses/i2c-stm32f4.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c
index d6a69df..83004f2 100644
--- a/drivers/i2c/busses/i2c-stm32f4.c
+++ b/drivers/i2c/busses/i2c-stm32f4.c
@@ -439,7 +439,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev)
int i;
switch (msg->count) {
- case 2:
+ case 1:
/*
* In order to correctly send the Stop or Repeated Start
* condition on the I2C bus, the STOP/START bit has to be set
@@ -454,7 +454,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev)
else
stm32f4_i2c_set_bits(reg, STM32F4_I2C_CR1_START);
- for (i = 2; i > 0; i--)
+ for (i = 1; i > 0; i--)
stm32f4_i2c_read_msg(i2c_dev);
reg = i2c_dev->base + STM32F4_I2C_CR2;
@@ -463,7 +463,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev)
complete(&i2c_dev->complete);
break;
- case 3:
+ case 2:
/*
* In order to correctly generate the NACK pulse after the last
* received data byte, we have to enable NACK before reading N-2
--
2.7.4
prev parent reply other threads:[~2020-05-08 1:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-08 1:46 [PATCH v3 0/4] Enable stmpe811 touch screen on stm32f429-disco board dillon.minfei
2020-05-08 1:46 ` [PATCH v3 1/4] ARM: dts: stm32: add I2C3 support on STM32F429 SoC dillon.minfei
2020-05-08 1:46 ` [PATCH v3 2/4] ARM: dts: stm32: Add pin map for I2C3 controller on stm32f4 dillon.minfei
2020-05-08 1:46 ` [PATCH v3 3/4] ARM: dts: stm32: enable stmpe811 on stm32429-disco board dillon.minfei
2020-05-08 1:46 ` dillon.minfei [this message]
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