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From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Alexandre Chartre <alexandre.chartre@oracle.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Andy Lutomirski <luto@kernel.org>, x86 <x86@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [tip: x86/entry] x86/entry: Convert SIMD coprocessor error exception to IDTENTRY
Date: Tue, 19 May 2020 19:58:28 -0000	[thread overview]
Message-ID: <158991830840.17951.9590853474984202597.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200505134906.021552202@linutronix.de>

The following commit has been merged into the x86/entry branch of tip:

Commit-ID:     03852142b159a78c77aa795ba6c6bd1f6273eab8
Gitweb:        https://git.kernel.org/tip/03852142b159a78c77aa795ba6c6bd1f6273eab8
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Tue, 25 Feb 2020 23:16:29 +01:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Tue, 19 May 2020 16:04:03 +02:00

x86/entry: Convert SIMD coprocessor error exception to IDTENTRY

Convert #XF to IDTENTRY_ERRORCODE:
  - Implement the C entry point with DEFINE_IDTENTRY
  - Emit the ASM stub with DECLARE_IDTENTRY
  - Handle INVD_BUG in C
  - Remove the ASM idtentry in 64bit
  - Remove the open coded ASM entry code in 32bit
  - Fixup the XEN/PV code
  - Remove the old prototypes
  - Remove the RCU warning as the new entry macro ensures correctness

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Link: https://lkml.kernel.org/r/20200505134906.021552202@linutronix.de


---
 arch/x86/entry/entry_32.S       | 14 --------------
 arch/x86/entry/entry_64.S       |  1 -
 arch/x86/include/asm/idtentry.h |  1 +
 arch/x86/include/asm/traps.h    |  3 ---
 arch/x86/kernel/idt.c           |  2 +-
 arch/x86/kernel/traps.c         | 29 +++++++++++++++++------------
 arch/x86/xen/enlighten_pv.c     |  2 +-
 arch/x86/xen/xen-asm_64.S       |  2 +-
 8 files changed, 21 insertions(+), 33 deletions(-)

diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index 7402890..c93fb73 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -1290,20 +1290,6 @@ SYM_FUNC_END(name)
 /* The include is where all of the SMP etc. interrupts come from */
 #include <asm/entry_arch.h>
 
-SYM_CODE_START(simd_coprocessor_error)
-	ASM_CLAC
-	pushl	$0
-#ifdef CONFIG_X86_INVD_BUG
-	/* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
-	ALTERNATIVE "pushl	$exc_general_protection",	\
-		    "pushl	$do_simd_coprocessor_error",	\
-		    X86_FEATURE_XMM
-#else
-	pushl	$do_simd_coprocessor_error
-#endif
-	jmp	common_exception
-SYM_CODE_END(simd_coprocessor_error)
-
 #ifdef CONFIG_PARAVIRT
 SYM_CODE_START(native_iret)
 	iret
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 3c95a63..1bada7b 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1073,7 +1073,6 @@ apicinterrupt IRQ_WORK_VECTOR			irq_work_interrupt		smp_irq_work_interrupt
  */
 
 idtentry	X86_TRAP_BP		int3			do_int3				has_error_code=0
-idtentry	X86_TRAP_XF		simd_coprocessor_error	do_simd_coprocessor_error	has_error_code=0
 
 idtentry	X86_TRAP_PF		page_fault		do_page_fault			has_error_code=1
 
diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index 531dbc0..99d4759 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -131,6 +131,7 @@ DECLARE_IDTENTRY(X86_TRAP_NM,		exc_device_not_available);
 DECLARE_IDTENTRY(X86_TRAP_OLD_MF,	exc_coproc_segment_overrun);
 DECLARE_IDTENTRY(X86_TRAP_SPURIOUS,	exc_spurious_interrupt_bug);
 DECLARE_IDTENTRY(X86_TRAP_MF,		exc_coprocessor_error);
+DECLARE_IDTENTRY(X86_TRAP_XF,		exc_simd_coprocessor_error);
 
 /* Simple exception entries with error code pushed by hardware */
 DECLARE_IDTENTRY_ERRORCODE(X86_TRAP_TS,	exc_invalid_tss);
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 0f755e1..e7eb753 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -22,7 +22,6 @@ asmlinkage void async_page_fault(void);
 #ifdef CONFIG_X86_MCE
 asmlinkage void machine_check(void);
 #endif /* CONFIG_X86_MCE */
-asmlinkage void simd_coprocessor_error(void);
 
 #if defined(CONFIG_X86_64) && defined(CONFIG_XEN_PV)
 asmlinkage void xen_xennmi(void);
@@ -33,7 +32,6 @@ asmlinkage void xen_page_fault(void);
 #ifdef CONFIG_X86_MCE
 asmlinkage void xen_machine_check(void);
 #endif /* CONFIG_X86_MCE */
-asmlinkage void xen_simd_coprocessor_error(void);
 #endif
 
 dotraplinkage void do_debug(struct pt_regs *regs, long error_code);
@@ -41,7 +39,6 @@ dotraplinkage void do_nmi(struct pt_regs *regs, long error_code);
 dotraplinkage void do_int3(struct pt_regs *regs, long error_code);
 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code, unsigned long cr2);
 dotraplinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code, unsigned long address);
-dotraplinkage void do_simd_coprocessor_error(struct pt_regs *regs, long error_code);
 #ifdef CONFIG_X86_32
 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code);
 #endif
diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index af48196..38b565b 100644
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -86,7 +86,7 @@ static const __initconst struct idt_data def_idts[] = {
 	INTG(X86_TRAP_SPURIOUS,		asm_exc_spurious_interrupt_bug),
 	INTG(X86_TRAP_MF,		asm_exc_coprocessor_error),
 	INTG(X86_TRAP_AC,		asm_exc_alignment_check),
-	INTG(X86_TRAP_XF,		simd_coprocessor_error),
+	INTG(X86_TRAP_XF,		asm_exc_simd_coprocessor_error),
 
 #ifdef CONFIG_X86_32
 	TSKG(X86_TRAP_DF,		GDT_ENTRY_DOUBLEFAULT_TSS),
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 9f156c8..1702922 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -810,7 +810,7 @@ NOKPROBE_SYMBOL(do_debug);
  * the correct behaviour even in the presence of the asynchronous
  * IRQ13 behaviour
  */
-static void math_error(struct pt_regs *regs, int error_code, int trapnr)
+static void math_error(struct pt_regs *regs, int trapnr)
 {
 	struct task_struct *task = current;
 	struct fpu *fpu = &task->thread.fpu;
@@ -821,15 +821,15 @@ static void math_error(struct pt_regs *regs, int error_code, int trapnr)
 	cond_local_irq_enable(regs);
 
 	if (!user_mode(regs)) {
-		if (fixup_exception(regs, trapnr, error_code, 0))
+		if (fixup_exception(regs, trapnr, 0, 0))
 			goto exit;
 
-		task->thread.error_code = error_code;
+		task->thread.error_code = 0;
 		task->thread.trap_nr = trapnr;
 
-		if (notify_die(DIE_TRAP, str, regs, error_code,
-					trapnr, SIGFPE) != NOTIFY_STOP)
-			die(str, regs, error_code);
+		if (notify_die(DIE_TRAP, str, regs, 0, trapnr,
+			       SIGFPE) != NOTIFY_STOP)
+			die(str, regs, 0);
 		goto exit;
 	}
 
@@ -839,7 +839,7 @@ static void math_error(struct pt_regs *regs, int error_code, int trapnr)
 	fpu__save(fpu);
 
 	task->thread.trap_nr	= trapnr;
-	task->thread.error_code = error_code;
+	task->thread.error_code = 0;
 
 	si_code = fpu__exception_code(fpu, trapnr);
 	/* Retry when we get spurious exceptions: */
@@ -854,14 +854,19 @@ exit:
 
 DEFINE_IDTENTRY(exc_coprocessor_error)
 {
-	math_error(regs, 0, X86_TRAP_MF);
+	math_error(regs, X86_TRAP_MF);
 }
 
-dotraplinkage void
-do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
+DEFINE_IDTENTRY(exc_simd_coprocessor_error)
 {
-	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
-	math_error(regs, error_code, X86_TRAP_XF);
+	if (IS_ENABLED(CONFIG_X86_INVD_BUG)) {
+		/* AMD 486 bug: INVD in CPL 0 raises #XF instead of #GP */
+		if (!static_cpu_has(X86_FEATURE_XMM)) {
+			__exc_general_protection(regs, 0);
+			return;
+		}
+	}
+	math_error(regs, X86_TRAP_XF);
 }
 
 DEFINE_IDTENTRY(exc_spurious_interrupt_bug)
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index afe12d9..c41152b 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -635,7 +635,7 @@ static struct trap_array_entry trap_array[] = {
 	TRAP_ENTRY(exc_spurious_interrupt_bug,		false ),
 	TRAP_ENTRY(exc_coprocessor_error,		false ),
 	TRAP_ENTRY(exc_alignment_check,			false ),
-	{ simd_coprocessor_error,      xen_simd_coprocessor_error,      false },
+	TRAP_ENTRY(exc_simd_coprocessor_error,		false ),
 };
 
 static bool __ref get_trap_addr(void **addr, unsigned int ist)
diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S
index a591bec..6a91157 100644
--- a/arch/x86/xen/xen-asm_64.S
+++ b/arch/x86/xen/xen-asm_64.S
@@ -50,7 +50,7 @@ xen_pv_trap asm_exc_alignment_check
 #ifdef CONFIG_X86_MCE
 xen_pv_trap machine_check
 #endif /* CONFIG_X86_MCE */
-xen_pv_trap simd_coprocessor_error
+xen_pv_trap asm_exc_simd_coprocessor_error
 #ifdef CONFIG_IA32_EMULATION
 xen_pv_trap entry_INT80_compat
 #endif

  parent reply	other threads:[~2020-05-19 20:02 UTC|newest]

Thread overview: 129+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-05 13:43 [patch V4 part 3 00/29] x86/entry: Entry/exception code rework, simple exceptions Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 01/29] x86/traps: Mark fixup_bad_iret() noinstr Thomas Gleixner
2020-05-09  0:39   ` Andy Lutomirski
2020-05-13  1:51     ` Steven Rostedt
2020-05-14  0:41       ` Mathieu Desnoyers
2020-05-14  1:35         ` Andy Lutomirski
2020-05-11 12:28   ` Masami Hiramatsu
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 02/29] x86/traps: Mark sync_regs() noinstr Thomas Gleixner
2020-05-09  0:39   ` Andy Lutomirski
2020-05-11 12:08   ` Masami Hiramatsu
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 03/29] x86/entry: Disable interrupts for native_load_gs_index() in C code Thomas Gleixner
2020-05-09  0:40   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 04/29] x86/traps: Make interrupt enable/disable symmetric " Thomas Gleixner
2020-05-07 15:25   ` Alexandre Chartre
2020-05-07 17:14     ` Thomas Gleixner
2020-05-09  0:44   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 05/29] x86/traps: Split trap numbers out in a seperate header Thomas Gleixner
2020-05-07 15:34   ` Alexandre Chartre
2020-05-19 19:58   ` [tip: x86/entry] x86/traps: Split trap numbers out in a separate header tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 06/29] x86/entry/64: Reorder idtentries Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 07/29] x86/entry: Distangle idtentry Thomas Gleixner
2020-05-10 20:31   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 08/29] x86/entry/64: Provide sane error entry/exit Thomas Gleixner
2020-05-10 21:02   ` Andy Lutomirski
2020-05-13  2:10   ` Steven Rostedt
2020-05-13  6:35     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 09/29] x86/entry/32: Provide macro to emit IDT entry stubs Thomas Gleixner
2020-05-11  0:55   ` Andy Lutomirski
2020-05-14  1:44   ` Mathieu Desnoyers
2020-05-14  4:31     ` Andy Lutomirski
2020-05-14 13:38       ` Mathieu Desnoyers
2020-05-14 14:08         ` Thomas Gleixner
2020-05-14 14:43           ` Mathieu Desnoyers
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 10/29] x86/idtentry: Provide macros to define/declare IDT entry points Thomas Gleixner
2020-05-11  0:58   ` Andy Lutomirski
2020-05-11 10:39     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 11/29] rcu: Provide rcu_irq_exit_preempt() Thomas Gleixner
2020-05-05 22:02   ` Paul E. McKenney
2020-05-05 22:05     ` Thomas Gleixner
2020-05-05 22:24       ` Paul E. McKenney
2020-05-14  1:03   ` Mathieu Desnoyers
2020-05-14  2:41   ` Joel Fernandes
2020-05-14  2:46     ` Joel Fernandes
2020-05-14 14:43     ` Thomas Gleixner
2020-05-15 19:00       ` Joel Fernandes
2020-05-19 19:52   ` [tip: core/rcu] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 12/29] x86/entry/common: Provide idtentry_enter/exit() Thomas Gleixner
2020-05-07 16:27   ` Alexandre Chartre
2020-05-11  4:34   ` Andy Lutomirski
2020-05-11 10:59     ` [patch V5 " Thomas Gleixner
2020-05-11 15:31       ` Andy Lutomirski
2020-05-11 18:42         ` Thomas Gleixner
2020-05-12 16:49           ` [patch V6 " Thomas Gleixner
2020-05-14  0:51             ` Andy Lutomirski
2020-05-14  1:08   ` [patch V4 " Mathieu Desnoyers
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 13/29] x86/traps: Prepare for using DEFINE_IDTENTRY Thomas Gleixner
2020-05-14  4:37   ` Andy Lutomirski
2020-05-14 12:16     ` Thomas Gleixner
2020-05-14 12:33       ` Peter Zijlstra
2020-05-15 13:42       ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 14/29] x86/entry: Convert Divide Error to IDTENTRY Thomas Gleixner
2020-05-14  4:38   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-10-11 15:25     ` Dmitry Vyukov
2020-10-11 17:50       ` Thomas Gleixner
2020-10-12 13:19       ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-10-12 20:30       ` [tip: x86/entry] x86/entry: Convert Divide Error to IDTENTRY Kees Cook
2020-10-13 10:19         ` Dmitry Vyukov
2020-10-13 17:41       ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 15/29] x86/entry: Convert Overflow exception to IDTENTRY Thomas Gleixner
2020-05-14  4:39   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 16/29] x86/entry: Convert Bounds " Thomas Gleixner
2020-05-14  4:42   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 17/29] x86/entry: Convert Invalid Opcode " Thomas Gleixner
2020-05-14  4:45   ` Andy Lutomirski
2020-05-14 12:33     ` Thomas Gleixner
2020-05-14 15:00       ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 18/29] x86/entry: Convert Device not available " Thomas Gleixner
2020-05-14  4:45   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 19/29] x86/entry: Convert Coprocessor segment overrun " Thomas Gleixner
2020-05-14  4:46   ` Andy Lutomirski
2020-05-05 13:44 ` [patch V4 part 3 20/29] x86/entry: Provide IDTENTRY_ERRORCODE Thomas Gleixner
2020-05-14  4:46   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] x86/idtentry: " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 21/29] x86/entry: Convert Invalid TSS exception to IDTENTRY Thomas Gleixner
2020-05-14  4:48   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 22/29] x86/entry: Convert Segment not present " Thomas Gleixner
2020-05-14  4:47   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 23/29] x86/entry: Convert Stack segment " Thomas Gleixner
2020-05-14  4:49   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 24/29] x86/entry: Convert General protection " Thomas Gleixner
2020-05-14  4:50   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 25/29] x86/entry: Convert Spurious interrupt bug " Thomas Gleixner
2020-05-14  4:47   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 26/29] x86/entry: Convert Coprocessor error " Thomas Gleixner
2020-05-14  4:49   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] x86/entry: Convert Coprocessor segment overrun " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 27/29] x86/entry: Convert Alignment check " Thomas Gleixner
2020-05-14  4:50   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 28/29] x86/entry: Convert SIMD coprocessor error " Thomas Gleixner
2020-05-14  4:56   ` Andy Lutomirski
2020-05-19 19:58   ` tip-bot2 for Thomas Gleixner [this message]
2020-05-05 13:44 ` [patch V4 part 3 29/29] x86/entry/32: Convert IRET exception to IDTENTRY_SW Thomas Gleixner
2020-05-07 16:47   ` Alexandre Chartre
2020-05-14  4:54   ` Andy Lutomirski
2020-05-15 14:11     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner

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