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[193.106.246.138]) by smtp.gmail.com with ESMTPSA id q22sm3643270lfc.33.2020.07.28.02.19.59 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Jul 2020 02:19:59 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com Cc: grzegorz.jaszczyk@linaro.org, robh+dt@kernel.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, david@lechnology.com, wmills@ti.com, praneeth@ti.com Subject: [PATCH v4 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Date: Tue, 28 Jul 2020 11:18:38 +0200 Message-Id: <1595927918-19845-6-git-send-email-grzegorz.jaszczyk@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1595927918-19845-1-git-send-email-grzegorz.jaszczyk@linaro.org> References: <1595927918-19845-1-git-send-email-grzegorz.jaszczyk@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suman Anna The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP, commonly called ICSSG. The PRUSS INTC present within the ICSSG supports more System Events (160 vs 64), more Interrupt Channels and Host Interrupts (20 vs 10) compared to the previous generation PRUSS INTC instances. The first 2 and the last 10 of these host interrupt lines are used by the PRU and other auxiliary cores and sub-modules within the ICSSG, with 8 host interrupts connected to MPU. The host interrupts 5, 6, 7 are also connected to the other ICSSG instances within the SoC and can be partitioned as per system integration through the board dts files. Enhance the PRUSS INTC driver to add support for this ICSSG INTC instance. Signed-off-by: Suman Anna Signed-off-by: Grzegorz Jaszczyk --- v3->v4: - Move generic part to "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts" patch and leave only platform related code. v2->v3: - Change patch order: use it directly after "irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops" and before new "irqchip/irq-pruss-intc: Add event mapping support" in order to reduce diff. v1->v2: - https://patchwork.kernel.org/patch/11069773/ --- drivers/irqchip/Kconfig | 2 +- drivers/irqchip/irq-pruss-intc.c | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 03e6ac1..d3297b7 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -495,7 +495,7 @@ config TI_SCI_INTA_IRQCHIP config TI_PRUSS_INTC tristate "TI PRU-ICSS Interrupt Controller" - depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE + depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3 select IRQ_DOMAIN help This enables support for the PRU-ICSS Local Interrupt Controller diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c index c13ba14..a56065b 100644 --- a/drivers/irqchip/irq-pruss-intc.c +++ b/drivers/irqchip/irq-pruss-intc.c @@ -623,11 +623,20 @@ static const struct pruss_intc_match_data pruss_intc_data = { .num_host_intrs = 10, }; +static const struct pruss_intc_match_data icssg_intc_data = { + .num_system_events = 160, + .num_host_intrs = 20, +}; + static const struct of_device_id pruss_intc_of_match[] = { { .compatible = "ti,pruss-intc", .data = &pruss_intc_data, }, + { + .compatible = "ti,icssg-intc", + .data = &icssg_intc_data, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, pruss_intc_of_match); -- 2.7.4