From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44573C433DF for ; Fri, 31 Jul 2020 12:30:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2841B21744 for ; Fri, 31 Jul 2020 12:30:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733224AbgGaMau (ORCPT ); Fri, 31 Jul 2020 08:30:50 -0400 Received: from mga05.intel.com ([192.55.52.43]:14340 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733165AbgGaMat (ORCPT ); Fri, 31 Jul 2020 08:30:49 -0400 IronPort-SDR: qso0NXiYmIYGRL9sBAHvzKYD5ogzs9Nur3tYLTSv/lTFVh/Y/SuxSrevimSWY1F9eH99QCQLBE H8H165BaG7oQ== X-IronPort-AV: E=McAfee;i="6000,8403,9698"; a="236630446" X-IronPort-AV: E=Sophos;i="5.75,418,1589266800"; d="scan'208";a="236630446" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jul 2020 05:30:49 -0700 IronPort-SDR: tBj6JDEK8ejNGpSr8gZ1dVM+t2WX/vR5FImmYsuAiPYGCPcU5PYRFf+B24IFK6YaDH71gxt5Z9 cZmfCbwdAmtQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,418,1589266800"; d="scan'208";a="365483191" Received: from brentlu-desk0.itwn.intel.com ([10.5.253.11]) by orsmga001.jf.intel.com with ESMTP; 31 Jul 2020 05:30:45 -0700 From: Brent Lu To: alsa-devel@alsa-project.org Cc: Cezary Rojewski , Pierre-Louis Bossart , Liam Girdwood , Jie Yang , Mark Brown , Jaroslav Kysela , Takashi Iwai , Kuninori Morimoto , Ranjani Sridharan , Brent Lu , linux-kernel@vger.kernel.org, Daniel Stuart , Andy Shevchenko , Yu-Hsuan Hsu , Guennadi Liakhovetski , Kai Vehmanen , Sam McNally , Damian van Soelen Subject: [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago board Date: Fri, 31 Jul 2020 20:26:05 +0800 Message-Id: <1596198365-10105-3-git-send-email-brent.lu@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1596198365-10105-1-git-send-email-brent.lu@intel.com> References: <1596020585-11517-1-git-send-email-brent.lu@intel.com> <1596198365-10105-1-git-send-email-brent.lu@intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yu-Hsuan Hsu The CRAS server does not set the period size in hw_param so ALSA will calculate a value for period size which is based on the buffer size and other parameters. The value may not always be aligned with Atom's dsp design so a constraint is added to make sure the board always has a good value. Cyan uses chtmax98090 and others(banon, celes, edgar, kefka...) use rt5650. Signed-off-by: Yu-Hsuan Hsu Signed-off-by: Brent Lu --- sound/soc/intel/boards/cht_bsw_max98090_ti.c | 14 +++++++++++++- sound/soc/intel/boards/cht_bsw_rt5645.c | 14 +++++++++++++- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/sound/soc/intel/boards/cht_bsw_max98090_ti.c b/sound/soc/intel/boards/cht_bsw_max98090_ti.c index 835e9bd..bf67254 100644 --- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c +++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c @@ -283,8 +283,20 @@ static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, static int cht_aif1_startup(struct snd_pcm_substream *substream) { - return snd_pcm_hw_constraint_single(substream->runtime, + int err; + + /* Set period size to 240 to align with Atom design */ + err = snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 240, 240); + if (err < 0) + return err; + + err = snd_pcm_hw_constraint_single(substream->runtime, SNDRV_PCM_HW_PARAM_RATE, 48000); + if (err < 0) + return err; + + return 0; } static int cht_max98090_headset_init(struct snd_soc_component *component) diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c b/sound/soc/intel/boards/cht_bsw_rt5645.c index b53c024..6e62f0d 100644 --- a/sound/soc/intel/boards/cht_bsw_rt5645.c +++ b/sound/soc/intel/boards/cht_bsw_rt5645.c @@ -414,8 +414,20 @@ static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, static int cht_aif1_startup(struct snd_pcm_substream *substream) { - return snd_pcm_hw_constraint_single(substream->runtime, + int err; + + /* Set period size to 240 to align with Atom design */ + err = snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 240, 240); + if (err < 0) + return err; + + err = snd_pcm_hw_constraint_single(substream->runtime, SNDRV_PCM_HW_PARAM_RATE, 48000); + if (err < 0) + return err; + + return 0; } static const struct snd_soc_ops cht_aif1_ops = { -- 2.7.4