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From: Catalin Marinas <catalin.marinas@arm.com>
To: Sami Tolvanen <samitolvanen@google.com>,
	Will Deacon <will@kernel.org>, Zhenyu Ye <yezhenyu2@huawei.com>
Cc: Marc Zyngier <maz@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Nick Desaulniers <ndesaulniers@google.com>,
	clang-built-linux@googlegroups.com,
	Mark Rutland <mark.rutland@arm.com>,
	Nathan Chancellor <natechancellor@gmail.com>,
	Kees Cook <keescook@chromium.org>
Subject: Re: [PATCH v2] arm64: use a common .arch preamble for inline assembly
Date: Fri, 28 Aug 2020 11:41:58 +0100	[thread overview]
Message-ID: <159861130822.26090.515756118612731592.b4-ty@arm.com> (raw)
In-Reply-To: <20200827203608.1225689-1-samitolvanen@google.com>

On Thu, 27 Aug 2020 13:36:08 -0700, Sami Tolvanen wrote:
> Commit 7c78f67e9bd9 ("arm64: enable tlbi range instructions") breaks
> LLVM's integrated assembler, because -Wa,-march is only passed to
> external assemblers and therefore, the new instructions are not enabled
> when IAS is used.
> 
> This change adds a common architecture version preamble, which can be
> used in inline assembly blocks that contain instructions that require
> a newer architecture version, and uses it to fix __TLBI_0 and __TLBI_1
> with ARM64_TLB_RANGE.

Applied to arm64 (for-next/fixes), thanks!

[1/1] arm64: use a common .arch preamble for inline assembly
      https://git.kernel.org/arm64/c/1764c3edc668

-- 
Catalin


      parent reply	other threads:[~2020-08-28 10:42 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-05 18:19 [PATCH] arm64: tlb: fix ARM64_TLB_RANGE with LLVM's integrated assembler Sami Tolvanen
2020-08-05 19:15 ` Nick Desaulniers
2020-08-06 11:30   ` Catalin Marinas
2020-08-06  7:17 ` Zhenyu Ye
2020-08-06 11:33   ` Catalin Marinas
2020-08-06 12:01 ` Catalin Marinas
2020-08-06 19:17   ` Sami Tolvanen
2020-08-27 20:36 ` [PATCH v2] arm64: use a common .arch preamble for inline assembly Sami Tolvanen
2020-08-27 20:57   ` Nathan Chancellor
2020-08-28 10:41   ` Catalin Marinas [this message]

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