From: Kim Phillips <kim.phillips@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: "Peter Zijlstra" <peterz@infradead.org>,
"Ingo Molnar" <mingo@kernel.org>,
"Ingo Molnar" <mingo@redhat.com>,
"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
"Andi Kleen" <ak@linux.intel.com>,
"Arnaldo Carvalho de Melo" <acme@kernel.org>,
"Babu Moger" <babu.moger@amd.com>,
"Fenghua Yu" <fenghua.yu@intel.com>,
"Frank van der Linden" <fllinden@amazon.com>,
"H . Peter Anvin" <hpa@zytor.com>,
"Huang Rui" <ray.huang@amd.com>,
"Janakarajan Natarajan" <Janakarajan.Natarajan@amd.com>,
"Jan Beulich" <jbeulich@suse.com>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Jiri Olsa" <jolsa@redhat.com>,
"Josh Poimboeuf" <jpoimboe@redhat.com>,
"Linus Torvalds" <torvalds@linux-foundation.org>,
"Luwei Kang" <luwei.kang@intel.com>,
"Martin Liška" <mliska@suse.cz>,
"Matt Fleming" <matt@codeblueprint.co.uk>,
"Michael Petlan" <mpetlan@redhat.com>,
"Namhyung Kim" <namhyung@kernel.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Pawan Gupta" <pawan.kumar.gupta@linux.intel.com>,
"Suravee Suthikulpanit" <Suravee.Suthikulpanit@amd.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Tom Lendacky" <thomas.lendacky@amd.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH v3] x86/cpu/amd: Enable the fixed Instructions Retired counter IRPERF
Date: Tue, 18 Feb 2020 15:35:25 -0600 [thread overview]
Message-ID: <15f0ff78-1a94-cfa7-297b-c226cb98d10f@amd.com> (raw)
In-Reply-To: <20200218112035.GB14449@zn.tnic>
Hi Borislav,
On 2/18/20 5:20 AM, Borislav Petkov wrote:
> On Fri, Feb 14, 2020 at 02:18:05PM -0600, Kim Phillips wrote:
>> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
>> index f3327cb56edf..8979d6fcc79c 100644
>> --- a/arch/x86/include/asm/cpufeatures.h
>> +++ b/arch/x86/include/asm/cpufeatures.h
>> @@ -404,5 +404,6 @@
>> #define X86_BUG_SWAPGS X86_BUG(21) /* CPU is affected by speculation through SWAPGS */
>> #define X86_BUG_TAA X86_BUG(22) /* CPU is affected by TSX Async Abort(TAA) */
>> #define X86_BUG_ITLB_MULTIHIT X86_BUG(23) /* CPU may incur MCE during certain page attribute changes */
>> +#define X86_BUG_IRPERF X86_BUG(24) /* CPU is affected by Instructions Retired counter Erratum 1054 */
>
> Do you need this bug flag at all?
>
> If the only reason for its existence is to check it before setting
> the MSR bit enabling IRPERF, then you don't need it. Or is there any
> particular reason why it should show in /proc/cpuinfo?
>
> IOW, does this work too?
Yes, that works quite nicely, and saves us a bug bit.
The only reason to have it show in /proc/cpuinfo is for userspace,
but they can check for a nonzero count prior to using, instead.
Let me know if you'd like me to send a v4, or if you will just apply
this version of yours.
Thanks,
Kim
next prev parent reply other threads:[~2020-02-18 21:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-14 20:18 [PATCH v3] x86/cpu/amd: Enable the fixed Instructions Retired counter IRPERF Kim Phillips
2020-02-18 11:20 ` Borislav Petkov
2020-02-18 21:35 ` Kim Phillips [this message]
2020-02-18 21:54 ` Borislav Petkov
2020-02-19 19:07 ` [tip: x86/urgent] " tip-bot2 for Kim Phillips
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