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From: "tip-bot2 for Tony Luck" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Tony Luck <tony.luck@intel.com>, Borislav Petkov <bp@suse.de>,
	x86 <x86@kernel.org>, LKML <linux-kernel@vger.kernel.org>
Subject: [tip: ras/core] x86/mce: Drop AMD-specific "DEFERRED" case from Intel severity rule list
Date: Wed, 30 Sep 2020 05:53:55 -0000	[thread overview]
Message-ID: <160144523516.7002.14378369290028684589.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200930021313.31810-3-tony.luck@intel.com>

The following commit has been merged into the ras/core branch of tip:

Commit-ID:     ed9705e4ad1c19ae51ed0cb4c112f9eb6dfc69fc
Gitweb:        https://git.kernel.org/tip/ed9705e4ad1c19ae51ed0cb4c112f9eb6dfc69fc
Author:        Tony Luck <tony.luck@intel.com>
AuthorDate:    Tue, 29 Sep 2020 19:13:13 -07:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Wed, 30 Sep 2020 07:49:58 +02:00

x86/mce: Drop AMD-specific "DEFERRED" case from Intel severity rule list

Way back in v3.19 Intel and AMD shared the same machine check severity
grading code. So it made sense to add a case for AMD DEFERRED errors in
commit

  e3480271f592 ("x86, mce, severity: Extend the the mce_severity mechanism to handle UCNA/DEFERRED error")

But later in v4.2 AMD switched to a separate grading function in
commit

  bf80bbd7dcf5 ("x86/mce: Add an AMD severities-grading function")

Belatedly drop the DEFERRED case from the Intel rule list.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200930021313.31810-3-tony.luck@intel.com
---
 arch/x86/kernel/cpu/mce/severity.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/severity.c b/arch/x86/kernel/cpu/mce/severity.c
index 567ce09..e072246 100644
--- a/arch/x86/kernel/cpu/mce/severity.c
+++ b/arch/x86/kernel/cpu/mce/severity.c
@@ -97,10 +97,6 @@ static struct severity {
 		EXCP, KERNEL_RECOV, MCGMASK(MCG_STATUS_RIPV, 0)
 		),
 	MCESEV(
-		DEFERRED, "Deferred error",
-		NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED)
-		),
-	MCESEV(
 		KEEP, "Corrected error",
 		NOSER, BITCLR(MCI_STATUS_UC)
 		),

      reply	other threads:[~2020-09-30  5:54 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-15 18:40 [PATCH] x86/mce: Add Skylake quirk for patrol scrub reported errors Tony Luck
2020-06-16 19:29 ` Borislav Petkov
2020-06-16 22:33   ` Luck, Tony
2020-06-17  7:41     ` Borislav Petkov
2020-06-17 18:49       ` Luck, Tony
2020-08-28 20:21         ` [PATCH v2] " Luck, Tony
2020-09-25 19:19           ` Borislav Petkov
2020-09-25 23:06             ` Luck, Tony
2020-09-27 22:19               ` Borislav Petkov
2020-09-30  2:13                 ` [PATCH 0/2] mce severity quirk & cleanup Tony Luck
2020-09-30  2:13                   ` [PATCH 1/2] x86/mce: Add Skylake quirk for patrol scrub reported errors Tony Luck
2020-09-30  5:53                     ` [tip: ras/core] " tip-bot2 for Borislav Petkov
2020-09-30  2:13                   ` [PATCH 2/2] x86/mce: Drop AMD specific "DEFERRED" case from Intel severity rule list Tony Luck
2020-09-30  5:53                     ` tip-bot2 for Tony Luck [this message]

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