linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "tip-bot2 for Mike Travis" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Mike Travis <mike.travis@hpe.com>, Borislav Petkov <bp@suse.de>,
	Steve Wahl <steve.wahl@hpe.com>, x86 <x86@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [tip: x86/platform] x86/platform/uv: Update UV5 TSC checking
Date: Wed, 07 Oct 2020 07:12:00 -0000	[thread overview]
Message-ID: <160205472083.7002.1987381597518958972.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20201005203929.148656-12-mike.travis@hpe.com>

The following commit has been merged into the x86/platform branch of tip:

Commit-ID:     6a7cf55e9f2b743695adac84375548aa18112327
Gitweb:        https://git.kernel.org/tip/6a7cf55e9f2b743695adac84375548aa18112327
Author:        Mike Travis <mike.travis@hpe.com>
AuthorDate:    Mon, 05 Oct 2020 15:39:27 -05:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Wed, 07 Oct 2020 09:09:04 +02:00

x86/platform/uv: Update UV5 TSC checking

Update check of BIOS TSC sync status to include both possible "invalid"
states provided by newer UV5 BIOS.

Signed-off-by: Mike Travis <mike.travis@hpe.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Steve Wahl <steve.wahl@hpe.com>
Link: https://lkml.kernel.org/r/20201005203929.148656-12-mike.travis@hpe.com
---
 arch/x86/include/asm/uv/uv_hub.h   |  2 +-
 arch/x86/kernel/apic/x2apic_uv_x.c | 24 ++++++++++--------------
 2 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index ecf5c93..07079b5 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -726,7 +726,7 @@ extern void uv_nmi_setup_hubless(void);
 #define UVH_TSC_SYNC_SHIFT_UV2K	16	/* UV2/3k have different bits */
 #define UVH_TSC_SYNC_MASK	3	/* 0011 */
 #define UVH_TSC_SYNC_VALID	3	/* 0011 */
-#define UVH_TSC_SYNC_INVALID	2	/* 0010 */
+#define UVH_TSC_SYNC_UNKNOWN	0	/* 0000 */
 
 /* BMC sets a bit this MMR non-zero before sending an NMI */
 #define UVH_NMI_MMR		UVH_BIOS_KERNEL_MMR
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9b44f45..9a83aa1 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -197,36 +197,32 @@ static void __init uv_tsc_check_sync(void)
 	int sync_state;
 	int mmr_shift;
 	char *state;
-	bool valid;
 
-	/* Accommodate different UV arch BIOSes */
+	/* Different returns from different UV BIOS versions */
 	mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR);
 	mmr_shift =
 		is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT;
 	sync_state = (mmr >> mmr_shift) & UVH_TSC_SYNC_MASK;
 
+	/* Check if TSC is valid for all sockets */
 	switch (sync_state) {
 	case UVH_TSC_SYNC_VALID:
 		state = "in sync";
-		valid = true;
+		mark_tsc_async_resets("UV BIOS");
 		break;
 
-	case UVH_TSC_SYNC_INVALID:
-		state = "unstable";
-		valid = false;
+	/* If BIOS state unknown, don't do anything */
+	case UVH_TSC_SYNC_UNKNOWN:
+		state = "unknown";
 		break;
+
+	/* Otherwise, BIOS indicates problem with TSC */
 	default:
-		state = "unknown: assuming valid";
-		valid = true;
+		state = "unstable";
+		mark_tsc_unstable("UV BIOS");
 		break;
 	}
 	pr_info("UV: TSC sync state from BIOS:0%d(%s)\n", sync_state, state);
-
-	/* Mark flag that says TSC != 0 is valid for socket 0 */
-	if (valid)
-		mark_tsc_async_resets("UV BIOS");
-	else
-		mark_tsc_unstable("UV BIOS");
 }
 
 /* Selector for (4|4A|5) structs */

  reply	other threads:[~2020-10-07  7:12 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-05 20:39 [PATCH v4 00/13] x86/platform/uv: Updates for UV5 Architecture Mike Travis
2020-10-05 20:39 ` [PATCH v4 01/13] x86/platform/uv: Remove UV BAU TLB Shootdown Handler Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 02/13] x86/platform/uv: Remove SCIR MMR references for UVY systems Mike Travis
2020-10-06 13:16   ` Borislav Petkov
2020-10-07  1:11     ` Mike Travis
2020-10-07  6:44       ` Borislav Petkov
2020-10-07  7:12   ` [tip: x86/platform] x86/platform/uv: Remove SCIR MMR references for UV systems tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 03/13] x86/platform/uv: Adjust references in UV kernel modules Mike Travis
2020-10-05 21:16   ` Borislav Petkov
2020-10-05 21:32     ` Mike Travis
2020-10-06 13:10       ` Borislav Petkov
2020-10-07  6:57         ` Borislav Petkov
2020-10-07  7:12   ` [tip: x86/platform] drivers/misc/sgi-xp: " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 04/13] x86/platform/uv: Update UV MMRs for UV5 Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 05/13] x86/platform/uv: Add UV5 direct references Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 06/13] x86/platform/uv: Add and Decode Arch Type in UVsystab Mike Travis
2020-10-05 21:21   ` Borislav Petkov
2020-10-05 21:35     ` Mike Travis
2020-10-06 15:19       ` Borislav Petkov
2020-10-07  1:21         ` Mike Travis
2020-10-07  7:05           ` Borislav Petkov
2020-10-07  7:12   ` [tip: x86/platform] x86/platform/uv: Add and decode " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 07/13] x86/platform/uv: Update MMIOH references based on new UV5 MMRs Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 08/13] x86/platform/uv: Adjust GAM MMR references affected by UV5 updates Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 09/13] x86/platform/uv: Update UV5 MMR references in UV GRU Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 10/13] x86/platform/uv: Update Node Present Counting Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] x86/platform/uv: Update node present counting tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 11/13] x86/platform/uv: Update UV5 TSC Checking Mike Travis
2020-10-07  7:12   ` tip-bot2 for Mike Travis [this message]
2020-10-05 20:39 ` [PATCH v4 12/13] x86/platform/uv: Update for UV5 NMI MMR changes Mike Travis
2020-10-07  7:12   ` [tip: x86/platform] " tip-bot2 for Mike Travis
2020-10-05 20:39 ` [PATCH v4 13/13] x86/platform/uv: Update Copyrights to conform to HPE standards Mike Travis
2020-10-07  7:11   ` [tip: x86/platform] " tip-bot2 for Mike Travis

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=160205472083.7002.1987381597518958972.tip-bot2@tip-bot2 \
    --to=tip-bot2@linutronix.de \
    --cc=bp@suse.de \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tip-commits@vger.kernel.org \
    --cc=mike.travis@hpe.com \
    --cc=steve.wahl@hpe.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).