From: Sibi Sankar <sibis@codeaurora.org>
To: bjorn.andersson@linaro.org, dianders@chromium.org
Cc: agross@kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
evgreen@chromium.org, robh+dt@kernel.org, swboyd@chromium.org,
mka@chromium.org, Sibi Sankar <sibis@codeaurora.org>
Subject: [PATCH v2 2/2] arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant
Date: Tue, 24 Nov 2020 11:51:16 +0530
Message-ID: <1606198876-3515-2-git-send-email-sibis@codeaurora.org> (raw)
In-Reply-To: <1606198876-3515-1-git-send-email-sibis@codeaurora.org>
Add DDR/L3 bandwidth votes for the pro variant of SC7180 SoC, as it support
frequencies upto 2.5 GHz.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 625e922c273d..05bc10a4c84d 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -527,6 +527,11 @@
opp-hz = /bits/ 64 <2400000000>;
opp-peak-kBps = <8532000 23347200>;
};
+
+ cpu6_opp16: opp-2553600000 {
+ opp-hz = /bits/ 64 <2553600000>;
+ opp-peak-kBps = <8532000 23347200>;
+ };
};
memory@80000000 {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-24 6:21 [PATCH v2 1/2] arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite Sibi Sankar
2020-11-24 6:21 ` Sibi Sankar [this message]
2020-11-24 17:55 ` [PATCH v2 2/2] arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant Doug Anderson
2020-11-24 17:55 ` [PATCH v2 1/2] arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite Doug Anderson
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