From: Yash Shah <yash.shah@sifive.com>
To: linux-spi@vger.kernel.org, linux-serial@vger.kernel.org,
linux-pwm@vger.kernel.org, linux-i2c@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, linux-gpio@vger.kernel.org
Cc: broonie@kernel.org, gregkh@linuxfoundation.org,
aou@eecs.berkeley.edu, lee.jones@linaro.org,
u.kleine-koenig@pengutronix.de, thierry.reding@gmail.com,
andrew@lunn.ch, peter@korsgaard.com, paul.walmsley@sifive.com,
palmer@dabbelt.com, robh+dt@kernel.org,
bgolaszewski@baylibre.com, linus.walleij@linaro.org,
Yash Shah <yash.shah@sifive.com>
Subject: [PATCH v2 1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
Date: Tue, 8 Dec 2020 10:25:33 +0530 [thread overview]
Message-ID: <1607403341-57214-2-git-send-email-yash.shah@sifive.com> (raw)
In-Reply-To: <1607403341-57214-1-git-send-email-yash.shah@sifive.com>
Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
cores ("harts") that are present on FU740-C000 SoC.
Signed-off-by: Yash Shah <yash.shah@sifive.com>
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index c6925e0..eb6843f 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -28,11 +28,17 @@ properties:
- items:
- enum:
- sifive,rocket0
+ - sifive,bullet0
- sifive,e5
+ - sifive,e7
- sifive,e51
+ - sifive,e71
- sifive,u54-mc
+ - sifive,u74-mc
- sifive,u54
+ - sifive,u74
- sifive,u5
+ - sifive,u7
- const: riscv
- const: riscv # Simulator only
description:
--
2.7.4
next prev parent reply other threads:[~2020-12-08 4:57 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 4:55 [PATCH v2 0/9] arch: riscv: add board and SoC DT file support Yash Shah
2020-12-08 4:55 ` Yash Shah [this message]
2020-12-10 3:55 ` [PATCH v2 1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC Rob Herring
2020-12-10 13:34 ` Bin Meng
2020-12-08 4:55 ` [PATCH v2 2/9] dt-bindings: spi: " Yash Shah
2020-12-08 4:55 ` [PATCH v2 3/9] dt-bindings: pwm: " Yash Shah
2020-12-10 3:56 ` Rob Herring
2020-12-08 4:55 ` [PATCH v2 4/9] dt-bindings: serial: " Yash Shah
2020-12-10 3:56 ` Rob Herring
2020-12-08 4:55 ` [PATCH v2 5/9] dt-bindings: gpio: " Yash Shah
2020-12-10 3:57 ` Rob Herring
2020-12-08 4:55 ` [PATCH v2 6/9] dt-bindings: i2c: " Yash Shah
2020-12-10 3:59 ` Rob Herring
2020-12-22 3:23 ` Palmer Dabbelt
2020-12-08 4:55 ` [PATCH v2 7/9] riscv: dts: add initial support for the SiFive FU740-C000 SoC Yash Shah
2020-12-10 13:34 ` Bin Meng
2020-12-16 5:24 ` Yash Shah
2020-12-16 6:06 ` Bin Meng
2020-12-16 6:12 ` Yash Shah
2021-07-16 12:49 ` Geert Uytterhoeven
2021-07-19 17:12 ` David Abdurachmanov
2020-12-08 4:55 ` [PATCH v2 8/9] dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board Yash Shah
2020-12-10 3:59 ` Rob Herring
2020-12-10 13:34 ` Bin Meng
2020-12-08 4:55 ` [PATCH v2 9/9] riscv: dts: add initial board data for the SiFive HiFive Unmatched Yash Shah
2020-12-10 13:34 ` Bin Meng
2020-12-08 17:11 ` (subset) [PATCH v2 0/9] arch: riscv: add board and SoC DT file support Mark Brown
2020-12-22 4:38 ` Palmer Dabbelt
2021-01-08 3:12 ` Palmer Dabbelt
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