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References: <20201208064702.3654324-1-vkoul@kernel.org> <20201208064702.3654324-5-vkoul@kernel.org> <160763259636.1580929.12912274485007017282@swboyd.mtv.corp.google.com> <20201211050257.GR8403@vkoul-mobl>
Subject: Re: [PATCH v2 4/5] clk: qcom: clk-alpha-pll: Add support for Lucid 5LPE PLL
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     linux-arm-msm@vger.kernel.org,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Vivek Aknurwar <viveka@codeaurora.org>,
        Andy Gross <agross@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Rob Herring <robh+dt@kernel.org>,
        Taniya Das <tdas@codeaurora.org>, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        Jeevan Shriram <jshriram@codeaurora.org>
To:     Vinod Koul <vkoul@kernel.org>
Date:   Thu, 10 Dec 2020 23:09:18 -0800
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Quoting Vinod Koul (2020-12-10 21:02:57)
> On 10-12-20, 12:36, Stephen Boyd wrote:
> > > +
> > > +       return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
> > > +                               (BIT(pll->width) - 1) << pll->post_di=
v_shift,
> >=20
> > Use GENMASK?
>=20
> Looks like this can be:
>                 GENMASK(pll->width + pll->post_div_shift - 1, pll->post_d=
iv_shift)
>=20
> Not sure which one you like :)

Preferably a local u32 mask =3D GENMASK(...)