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References: <20201208064702.3654324-1-vkoul@kernel.org> <20201208064702.3654324-6-vkoul@kernel.org> <160763302790.1580929.10258660966995584297@swboyd.mtv.corp.google.com> <20201211054349.GS8403@vkoul-mobl>
Subject: Re: [PATCH v2 5/5] clk: qcom: gcc: Add clock driver for SM8350
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     linux-arm-msm@vger.kernel.org,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Vivek Aknurwar <viveka@codeaurora.org>,
        Andy Gross <agross@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Rob Herring <robh+dt@kernel.org>,
        Taniya Das <tdas@codeaurora.org>, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        Jeevan Shriram <jshriram@codeaurora.org>
To:     Vinod Koul <vkoul@kernel.org>
Date:   Thu, 10 Dec 2020 23:10:28 -0800
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Quoting Vinod Koul (2020-12-10 21:43:49)
> On 10-12-20, 12:43, Stephen Boyd wrote:
> > > +static struct clk_branch gcc_camera_ahb_clk =3D {
> > > +       .halt_reg =3D 0x26004,
> > > +       .halt_check =3D BRANCH_HALT_DELAY,
> > > +       .hwcg_reg =3D 0x26004,
> > > +       .hwcg_bit =3D 1,
> > > +       .clkr =3D {
> > > +               .enable_reg =3D 0x26004,
> > > +               .enable_mask =3D BIT(0),
> > > +               .hw.init =3D &(struct clk_init_data){
> > > +                       .name =3D "gcc_camera_ahb_clk",
> > > +                       .flags =3D CLK_IS_CRITICAL,
> >=20
> > Why is it critical? Can we just enable it in driver probe and stop
> > modeling it as a clk?
>=20
> it does not have a parent we control, yeah it would make sense to do
> that. Tanya do you folks agree ..?
>=20

Maybe it is needed for camera clk controller? Have to check other SoCs
and see if they're using it.