From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7265DC433FE for ; Fri, 11 Dec 2020 15:25:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 38BFE22D72 for ; Fri, 11 Dec 2020 15:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2436631AbgLKPAC (ORCPT ); Fri, 11 Dec 2020 10:00:02 -0500 Received: from Galois.linutronix.de ([193.142.43.55]:35738 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406453AbgLKO7i (ORCPT ); Fri, 11 Dec 2020 09:59:38 -0500 Date: Fri, 11 Dec 2020 14:58:45 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1607698726; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6djCgbLXaMD9v6HbNJK3oD3FE5gTLY/JW285Yb5L6SY=; b=wPaJ0Lgibx/2i2b7bxDs66YX/8nHVmLd5jBsGaDLrVRa+n506vyxjGaUeHNi4H6z4JkY1i fIhX3wTtNANouGffP5w3mTu9rRKxSeVFpg+PqrZmuOrOn9p9LQrDQo2sVKayovTRIUy1NS vUgIXNAK7dpBGXNT3+aJ5FYOORUW7qFJEzC0iftRbcyC+AdCk8Hf7IsSTbmcBJWeyk8S/d 8gRfUd4lsNqS+xtQCtxI25plAmoDws8aKTmJmoDRRiuuG/ZUX5O3TVcoI63qbi5hA86Z6H yfJQQ4Fv5QuoermT1p/zTlEOTzsCoWuoMoopdFSziTbTrtkU4MRjOXMN2/ry8Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1607698726; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6djCgbLXaMD9v6HbNJK3oD3FE5gTLY/JW285Yb5L6SY=; b=wnvlb7FnAr/42LkxlJ1dtZTfmr/qt3XKmibApvvDy/xL1GUkTyBNrucfh48WGFr166jvLh cvXR0YAK+cyNDfAA== From: "irqchip-bot for Biwen Li" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-kernel@vger.kernel.org Subject: [irqchip: irq/irqchip-next] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Cc: Biwen Li , Marc Zyngier , Rob Herring , tglx@linutronix.de In-Reply-To: <20201130101515.27431-11-biwen.li@oss.nxp.com> References: <20201130101515.27431-11-biwen.li@oss.nxp.com> MIME-Version: 1.0 Message-ID: <160769872582.3364.4412521407126046603.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the irq/irqchip-next branch of irqchip: Commit-ID: 9898a59358d7cb925f63bb77bd40224d1bc4857e Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/9898a59358d7cb925f63bb77bd40224d1bc4857e Author: Biwen Li AuthorDate: Mon, 30 Nov 2020 18:15:15 +08:00 Committer: Marc Zyngier CommitterDate: Fri, 11 Dec 2020 14:45:21 dt-bindings: interrupt-controller: update bindings for supporting more SoCs Update bindings for Layerscape external irqs, support more SoCs(LS1043A, LS1046A, LS1088A, LS208xA, LX216xA) Signed-off-by: Biwen Li Signed-off-by: Marc Zyngier Acked-by: Rob Herring Link: https://lore.kernel.org/r/20201130101515.27431-11-biwen.li@oss.nxp.com --- Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt index f0ad780..4d47df1 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt @@ -1,6 +1,7 @@ * Freescale Layerscape external IRQs -Some Layerscape SOCs (LS1021A, LS1043A, LS1046A) support inverting +Some Layerscape SOCs (LS1021A, LS1043A, LS1046A +LS1088A, LS208xA, LX216xA) support inverting the polarity of certain external interrupt lines. The device node must be a child of the node representing the @@ -8,12 +9,15 @@ Supplemental Configuration Unit (SCFG). Required properties: - compatible: should be "fsl,-extirq", e.g. "fsl,ls1021a-extirq". + "fsl,ls1043a-extirq": for LS1043A, LS1046A. + "fsl,ls1088a-extirq": for LS1088A, LS208xA, LX216xA. - #interrupt-cells: Must be 2. The first element is the index of the external interrupt line. The second element is the trigger type. - #address-cells: Must be 0. - interrupt-controller: Identifies the node as an interrupt controller - reg: Specifies the Interrupt Polarity Control Register (INTPCR) in - the SCFG. + the SCFG or the External Interrupt Control Register (IRQCR) in + the ISC. - interrupt-map: Specifies the mapping from external interrupts to GIC interrupts. - interrupt-map-mask: Must be <0xffffffff 0>.