From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<broonie@kernel.org>, <robh+dt@kernel.org>, <lukas@wunner.de>
Cc: <skomatineni@nvidia.com>, <bbrezillon@kernel.org>,
<p.yadav@ti.com>, <tudor.ambarus@microchip.com>,
<linux-spi@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v5 8/9] arm64: tegra: Add QSPI nodes on Tegra194
Date: Mon, 21 Dec 2020 13:17:38 -0800 [thread overview]
Message-ID: <1608585459-17250-9-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1608585459-17250-1-git-send-email-skomatineni@nvidia.com>
Tegra194 has 2 QSPI controllers.
This patch adds DT node for these 2 QSPI controllers.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 25f36d6..852980f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -609,6 +609,34 @@
status = "disabled";
};
+ spi@3270000 {
+ compatible = "nvidia,tegra194-qspi";
+ reg = <0x3270000 0x1000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp TEGRA194_CLK_QSPI0>,
+ <&bpmp TEGRA194_CLK_QSPI0_PM>;
+ clock-names = "qspi", "qspi_out";
+ resets = <&bpmp TEGRA194_RESET_QSPI0>;
+ reset-names = "qspi";
+ status = "disabled";
+ };
+
+ spi@3300000 {
+ compatible = "nvidia,tegra194-qspi";
+ reg = <0x3300000 0x1000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&bpmp TEGRA194_CLK_QSPI1>,
+ <&bpmp TEGRA194_CLK_QSPI1_PM>;
+ clock-names = "qspi", "qspi_out";
+ resets = <&bpmp TEGRA194_RESET_QSPI1>;
+ reset-names = "qspi";
+ status = "disabled";
+ };
+
pwm1: pwm@3280000 {
compatible = "nvidia,tegra194-pwm",
"nvidia,tegra186-pwm";
--
2.7.4
next prev parent reply other threads:[~2020-12-21 21:19 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-21 21:17 [PATCH v5 0/9] Add Tegra Quad SPI driver Sowjanya Komatineni
2020-12-21 21:17 ` [PATCH v5 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM Sowjanya Komatineni
2021-01-26 10:03 ` Thierry Reding
2021-01-26 12:23 ` Mark Brown
2020-12-21 21:17 ` [PATCH v5 2/9] dt-bindings: spi: Add Tegra Quad SPI device tree binding Sowjanya Komatineni
2020-12-31 18:33 ` Rob Herring
2021-01-04 17:33 ` Sowjanya Komatineni
2020-12-21 21:17 ` [PATCH v5 3/9] MAINTAINERS: Add Tegra Quad SPI driver section Sowjanya Komatineni
2020-12-21 21:17 ` [PATCH v5 4/9] spi: tegra210-quad: Add support for Tegra210 QSPI controller Sowjanya Komatineni
2020-12-21 21:17 ` [PATCH v5 5/9] spi: spi-mem: Mark dummy transfers by setting dummy_data bit Sowjanya Komatineni
2020-12-21 21:17 ` [PATCH v5 6/9] spi: tegra210-quad: Add support for hardware dummy cycles transfer Sowjanya Komatineni
2020-12-21 21:17 ` [PATCH v5 7/9] arm64: tegra: Enable QSPI on Jetson Nano Sowjanya Komatineni
2020-12-21 21:17 ` Sowjanya Komatineni [this message]
2020-12-21 21:17 ` [PATCH v5 9/9] arm64: tegra: Enable QSPI on Jetson Xavier NX Sowjanya Komatineni
2021-01-06 14:59 ` (subset) [PATCH v5 0/9] Add Tegra Quad SPI driver Mark Brown
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