From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 372C1C43381 for ; Mon, 28 Dec 2020 23:02:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1739F222BB for ; Mon, 28 Dec 2020 23:02:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731787AbgL1W4V (ORCPT ); Mon, 28 Dec 2020 17:56:21 -0500 Received: from lists.gateworks.com ([108.161.130.12]:47122 "EHLO lists.gateworks.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729553AbgL1Vqh (ORCPT ); Mon, 28 Dec 2020 16:46:37 -0500 Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by lists.gateworks.com with esmtp (Exim 4.82) (envelope-from ) id 1ku0S9-0005Zf-Nx; Mon, 28 Dec 2020 21:53:22 +0000 From: Tim Harvey To: Mark Brown , "Rafael J . Wysocki" , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Laxminath Kasam , Tony Lindgren , Lee Jones Cc: Tim Harvey , Robert Jones Subject: [PATCH] regmap: irq: do not allow setting irq bits during ack Date: Mon, 28 Dec 2020 13:45:51 -0800 Message-Id: <1609191951-15590-1-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some interrupt controllers may not de-assert their interrupt if bits are set when acknowledging the bits that caused the interrupt. Take care to not apply the mask to the status until we are done acknowledging the interrupt and take care to mask the bits according for the ack_invert state. This is needed to avoid a stuck interrupt case for the Gateworks System Controller which uses ack_invert. If the status has the mask applied before clearing the bits it will end up setting bits that are enabled but were not the cause the interrupt which will keep the GSC from ever de-asserting its interrupt. Cc: Tony Lindgren Cc: Laxminath Kasam Cc: Robert Jones Signed-off-by: Tim Harvey --- drivers/base/regmap/regmap-irq.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c index ad5c2de..560c641 100644 --- a/drivers/base/regmap/regmap-irq.c +++ b/drivers/base/regmap/regmap-irq.c @@ -496,29 +496,29 @@ static irqreturn_t regmap_irq_thread(int irq, void *d) * doing a write per register. */ for (i = 0; i < data->chip->num_regs; i++) { - data->status_buf[i] &= ~data->mask_buf[i]; - - if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) { + if ((data->status_buf[i] && ~data->mask_buf[i]) && + (chip->ack_base || chip->use_ack)) { reg = chip->ack_base + (i * map->reg_stride * data->irq_reg_stride); if (chip->ack_invert) ret = regmap_write(map, reg, - ~data->status_buf[i]); + ~data->status_buf[i] & data->mask_buf[i]); else ret = regmap_write(map, reg, - data->status_buf[i]); + data->status_buf[i] & ~data->mask_buf[i]); if (chip->clear_ack) { if (chip->ack_invert && !ret) ret = regmap_write(map, reg, - data->status_buf[i]); + data->status_buf[i] & ~data->mask_buf[i]); else if (!ret) ret = regmap_write(map, reg, - ~data->status_buf[i]); + ~data->status_buf[i] & data->mask_buf[i]); } if (ret != 0) dev_err(map->dev, "Failed to ack 0x%x: %d\n", reg, ret); } + data->status_buf[i] &= ~data->mask_buf[i]; } for (i = 0; i < chip->num_irqs; i++) { -- 2.7.4