From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8001FC433E9 for ; Tue, 29 Dec 2020 06:18:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5CAF820798 for ; Tue, 29 Dec 2020 06:18:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726390AbgL2GSL (ORCPT ); Tue, 29 Dec 2020 01:18:11 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:45532 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726029AbgL2GSL (ORCPT ); Tue, 29 Dec 2020 01:18:11 -0500 X-UUID: 764e0c4411ae4c1b93d096821168c564-20201229 X-UUID: 764e0c4411ae4c1b93d096821168c564-20201229 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 727670328; Tue, 29 Dec 2020 14:17:19 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 29 Dec 2020 14:17:16 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 29 Dec 2020 14:17:16 +0800 From: Hector Yuan To: , , , "Rafael J. Wysocki" , Viresh Kumar , Matthias Brugger , Rob Herring , , CC: , Subject: [PATCH v10] cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver Date: Tue, 29 Dec 2020 14:17:07 +0800 Message-ID: <1609222629-2979-1-git-send-email-hector.yuan@mediatek.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The CPUfreq HW present in some Mediatek chipsets offloads the steps necessary for changing the frequency of CPUs. The driver implements the cpufreq driver interface for this hardware engine. This patch depends on MT6779 DTS patchset[1] submitted by Hanks Chen. >From v8 to v9, there are three more modifications. 1. Based on patchset[2], align binding with scmi for performance domain. 2. Add the CPUFREQ fast switch function support and define DVFS latency. 3. Based on patchser[3], add energy model API parameter for mW. >From v7 to v8, there are three more patches based on patchset v8[4]. This patchset is about to register power table to Energy model for EAS and thermal usage. 1. EM CPU power table - Register energy model table for EAS and thermal cooling device usage. - Read the coresponding LUT for power table. 2. SVS initialization - The SVS(Smart Voltage Scaling) engine is a hardware which is used to calculate optimized voltage values for CPU power domain. DVFS driver could apply those optimized voltage values to reduce power consumption. - Driver will polling if HW engine is done for SVS initialization. After that, driver will read power table and register it to EAS. - CPUs must be in power on state when doing SVS. Use pm_qos to block cpu-idle state for SVS initializing. 3. Cooling device flag - Add cooling device flag for thermal [1] https://lkml.org/lkml/2020/8/4/1094 [2] https://lore.kernel.org/lkml/20201116181356.804590-1-sudeep.holla@arm.com/ [3] https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git/commit/?h=linux-next&id=c250d50fe2ce627ca9805d9c8ac11cbbf922a4a6 [4] https://lkml.org/lkml/2020/9/23/384 Hector.Yuan (2): cpufreq: mediatek-hw: Add support for CPUFREQ HW dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 116 ++++++ drivers/cpufreq/Kconfig.arm | 12 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/mediatek-cpufreq-hw.c | 370 ++++++++++++++++++++ 4 files changed, 499 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml create mode 100644 drivers/cpufreq/mediatek-cpufreq-hw.c