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[193.116.97.30]) by smtp.gmail.com with ESMTPSA id e13sm44423131pfj.63.2020.12.30.03.57.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Dec 2020 03:57:27 -0800 (PST) Date: Wed, 30 Dec 2020 21:57:21 +1000 From: Nicholas Piggin Subject: Re: [RFC please help] membarrier: Rewrite sync_core_before_usermode() To: Russell King - ARM Linux admin Cc: Arnd Bergmann , Benjamin Herrenschmidt , Catalin Marinas , Jann Horn , linux-arm-kernel , linux-kernel , linuxppc-dev , Andy Lutomirski , Mathieu Desnoyers , Michael Ellerman , paulmck , Paul Mackerras , Peter Zijlstra , stable , Will Deacon , x86 References: <20201228190852.GI1551@shell.armlinux.org.uk> <1086654515.3607.1609187556216.JavaMail.zimbra@efficios.com> <1609200902.me5niwm2t6.astroid@bobo.none> <1609210162.4d8dqilke6.astroid@bobo.none> <20201229104456.GK1551@shell.armlinux.org.uk> <1609290821.wrfh89v23a.astroid@bobo.none> <20201230100028.GP1551@shell.armlinux.org.uk> <20201230105847.GQ1551@shell.armlinux.org.uk> In-Reply-To: <20201230105847.GQ1551@shell.armlinux.org.uk> MIME-Version: 1.0 Message-Id: <1609327110.c18a3h158t.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Excerpts from Russell King - ARM Linux admin's message of December 30, 2020= 8:58 pm: > On Wed, Dec 30, 2020 at 10:00:28AM +0000, Russell King - ARM Linux admin = wrote: >> On Wed, Dec 30, 2020 at 12:33:02PM +1000, Nicholas Piggin wrote: >> > Excerpts from Russell King - ARM Linux admin's message of December 29,= 2020 8:44 pm: >> > > On Tue, Dec 29, 2020 at 01:09:12PM +1000, Nicholas Piggin wrote: >> > >> I think it should certainly be documented in terms of what guarante= es >> > >> it provides to application, _not_ the kinds of instructions it may = or >> > >> may not induce the core to execute. And if existing API can't be >> > >> re-documented sanely, then deprecatd and new ones added that DTRT. >> > >> Possibly under a new system call, if arch's like ARM want a range >> > >> flush and we don't want to expand the multiplexing behaviour of >> > >> membarrier even more (sigh). >> > >=20 >> > > The 32-bit ARM sys_cacheflush() is there only to support self-modify= ing >> > > code, and takes whatever actions are necessary to support that. >> > > Exactly what actions it takes are cache implementation specific, and >> > > should be of no concern to the caller, but the underlying thing is..= . >> > > it's to support self-modifying code. >> >=20 >> > Caveat >> > cacheflush() should not be used in programs intended to be p= ortable. >> > On Linux, this call first appeared on the MIPS architecture, bu= t nowa=E2=80=90 >> > days, Linux provides a cacheflush() system call on some other a= rchitec=E2=80=90 >> > tures, but with different arguments. >> >=20 >> > What a disaster. Another badly designed interface, although it didn't=20 >> > originate in Linux it sounds like we weren't to be outdone so >> > we messed it up even worse. >> >=20 >> > flushing caches is neither necessary nor sufficient for code modificat= ion >> > on many processors. Maybe some old MIPS specific private thing was fin= e, >> > but certainly before it grew to other architectures, somebody should=20 >> > have thought for more than 2 minutes about it. Sigh. >>=20 >> WARNING: You are bordering on being objectionable and offensive with >> that comment. >>=20 >> The ARM interface was designed by me back in the very early days of >> Linux, probably while you were still in dypers, based on what was >> known at the time. Back in the early 2000s, ideas such as relaxed >> memory ordering were not known. All there was was one level of >> harvard cache. I wasn't talking about memory ordering at all, and I assumed it came earlier and was brought to Linux for portability reasons - CONFORMING TO Historically, this system call was available on all MIPS UNIX varia= nts including RISC/os, IRIX, Ultrix, NetBSD, OpenBSD, and FreeBSD (and a= lso on some non-UNIX MIPS operating systems), so that the existence of t= his call in MIPS operating systems is a de-facto standard. I don't think the call was totally unreasonable for incoherent virtual=20 caches or incoherent i/d caches etc. Although early unix system call interf= ace demonstrates that people understood how to define good interfaces that deal= t with intent at an abstract level rather than implementation -- munmap=20 doesn't specify anywhere that a TLB flush instruction must be executed,=20 for example. So "cacheflush" was obviously never a well designed interface=20 but rather the typical hardware-centric hack to get their stuff working (which was fine for its purpose I'm sure). >=20 > Sorry, I got that slightly wrong. Its origins on ARM were from 12 Dec > 1998: >=20 > http://www.armlinux.org.uk/developer/patches/viewpatch.php?id=3D88/1 >=20 > by Philip Blundell, and first appeared in the ARM > pre-patch-2.1.131-19981214-1.gz. It was subsequently documented in the > kernel sources by me in July 2001 in ARM patch-2.4.6-rmk2.gz. It has > a slightly different signature: the third argument on ARM is a flags > argument, whereas the MIPS code, it is some undocumented "cache" > parameter. >=20 > Whether the ARM version pre or post dates the MIPS code, I couldn't say. > Whether it was ultimately taken from the MIPS implementation, again, I > couldn't say. I can, it was in MIPS in late 1.3 kernels at least. I would guess it came from IRIX. > However, please stop insulting your fellow developers ability to think. Sorry, I was being melodramatic. Everyone makes mistakes or decisions which with hindsight could have been better or were under some=20 constraint that isn't apparent. I shouldn't have suggested it indicated=20 thoughtlessness. Thanks, Nick