* [PATCH V2] mtd: rawnand: qcom: update last code word register
@ 2021-01-04 18:31 Md Sadre Alam
2021-01-05 13:31 ` Miquel Raynal
0 siblings, 1 reply; 2+ messages in thread
From: Md Sadre Alam @ 2021-01-04 18:31 UTC (permalink / raw)
To: miquel.raynal, manivannan.sadhasivam, linux-mtd, linux-kernel,
boris.brezillon, vigneshr
Cc: mdalam, sricharan
From QPIC version 2.0 onwards new register got added to
read last codeword. This change will update the same.
For first three code word READ_LOCATION_n register will be
use.For last code wrod READ_LOCATION_LAST_CW_n register will be
use.
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
---
[V2]
* Fixed alignment for NAND_READ_LOCATION_LAST_CW_n reg macro
* Changed number of register write to 1 when NAND_READ_LOCATION_LAST_CW_n register will use
drivers/mtd/nand/raw/qcom_nandc.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index eaef51d..9e89236 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -48,10 +48,10 @@
#define NAND_READ_LOCATION_1 0xf24
#define NAND_READ_LOCATION_2 0xf28
#define NAND_READ_LOCATION_3 0xf2c
-#define NAND_READ_LOCATION_LAST_CW_0 0xf40
-#define NAND_READ_LOCATION_LAST_CW_1 0xf44
-#define NAND_READ_LOCATION_LAST_CW_2 0xf48
-#define NAND_READ_LOCATION_LAST_CW_3 0xf4c
+#define NAND_READ_LOCATION_LAST_CW_0 0xf40
+#define NAND_READ_LOCATION_LAST_CW_1 0xf44
+#define NAND_READ_LOCATION_LAST_CW_2 0xf48
+#define NAND_READ_LOCATION_LAST_CW_3 0xf4c
/* dummy register offsets, used by write_reg_dma */
#define NAND_DEV_CMD1_RESTORE 0xdead
@@ -1125,7 +1125,7 @@ config_nand_cw_read(struct qcom_nand_controller *nandc, bool use_ecc)
if (nandc->props->is_bam) {
if (nandc->props->qpic_v2)
write_reg_dma(nandc, NAND_READ_LOCATION_LAST_CW_0,
- 4, NAND_BAM_NEXT_SGL);
+ 1, NAND_BAM_NEXT_SGL);
write_reg_dma(nandc, NAND_READ_LOCATION_0, 4,
NAND_BAM_NEXT_SGL);
}
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH V2] mtd: rawnand: qcom: update last code word register
2021-01-04 18:31 [PATCH V2] mtd: rawnand: qcom: update last code word register Md Sadre Alam
@ 2021-01-05 13:31 ` Miquel Raynal
0 siblings, 0 replies; 2+ messages in thread
From: Miquel Raynal @ 2021-01-05 13:31 UTC (permalink / raw)
To: Md Sadre Alam
Cc: manivannan.sadhasivam, linux-mtd, linux-kernel, boris.brezillon,
vigneshr, sricharan
Hello,
Md Sadre Alam <mdalam@codeaurora.org> wrote on Tue, 5 Jan 2021
00:01:18 +0530:
> From QPIC version 2.0 onwards new register got added to
> read last codeword. This change will update the same.
>
> For first three code word READ_LOCATION_n register will be
> use.For last code wrod READ_LOCATION_LAST_CW_n register will be
s/wrod/word
> use.
>
Please add a Fixes tag here
> Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
> ---
> [V2]
> * Fixed alignment for NAND_READ_LOCATION_LAST_CW_n reg macro
> * Changed number of register write to 1 when NAND_READ_LOCATION_LAST_CW_n register will use
> drivers/mtd/nand/raw/qcom_nandc.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> index eaef51d..9e89236 100644
> --- a/drivers/mtd/nand/raw/qcom_nandc.c
> +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> @@ -48,10 +48,10 @@
> #define NAND_READ_LOCATION_1 0xf24
> #define NAND_READ_LOCATION_2 0xf28
> #define NAND_READ_LOCATION_3 0xf2c
> -#define NAND_READ_LOCATION_LAST_CW_0 0xf40
> -#define NAND_READ_LOCATION_LAST_CW_1 0xf44
> -#define NAND_READ_LOCATION_LAST_CW_2 0xf48
> -#define NAND_READ_LOCATION_LAST_CW_3 0xf4c
> +#define NAND_READ_LOCATION_LAST_CW_0 0xf40
> +#define NAND_READ_LOCATION_LAST_CW_1 0xf44
> +#define NAND_READ_LOCATION_LAST_CW_2 0xf48
> +#define NAND_READ_LOCATION_LAST_CW_3 0xf4c
It looks like you forgot to squash this to you original patch :)
>
> /* dummy register offsets, used by write_reg_dma */
> #define NAND_DEV_CMD1_RESTORE 0xdead
> @@ -1125,7 +1125,7 @@ config_nand_cw_read(struct qcom_nand_controller *nandc, bool use_ecc)
> if (nandc->props->is_bam) {
> if (nandc->props->qpic_v2)
> write_reg_dma(nandc, NAND_READ_LOCATION_LAST_CW_0,
> - 4, NAND_BAM_NEXT_SGL);
> + 1, NAND_BAM_NEXT_SGL);
> write_reg_dma(nandc, NAND_READ_LOCATION_0, 4,
> NAND_BAM_NEXT_SGL);
> }
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2021-01-05 13:32 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-04 18:31 [PATCH V2] mtd: rawnand: qcom: update last code word register Md Sadre Alam
2021-01-05 13:31 ` Miquel Raynal
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).