From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Hsin-Yi Wang <hsinyi@chromium.org>,
Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v3, 05/15] drm/mediatek: add component POSTMASK
Date: Mon, 11 Jan 2021 15:43:41 +0800 [thread overview]
Message-ID: <1610351031-21133-6-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1610351031-21133-1-git-send-email-yongqiang.niu@mediatek.com>
This patch add component POSTMASK,
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/Makefile | 1 +
drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 160 +++++++++++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
6 files changed, 168 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile
index 17a08e2..ce5ad59 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -3,6 +3,7 @@
mediatek-drm-y := mtk_disp_color.o \
mtk_disp_gamma.o \
mtk_disp_ovl.o \
+ mtk_disp_postmask.o \
mtk_disp_rdma.o \
mtk_drm_crtc.o \
mtk_drm_ddp.o \
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
new file mode 100644
index 0000000..736224c
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
@@ -0,0 +1,160 @@
+/*
+ * SPDX-License-Identifier:
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#include <linux/clk.h>
+#include <linux/component.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/soc/mediatek/mtk-cmdq.h>
+
+#include "mtk_drm_crtc.h"
+#include "mtk_drm_ddp_comp.h"
+
+#define DISP_POSTMASK_EN 0x0000
+#define POSTMASK_EN BIT(0)
+#define DISP_POSTMASK_CFG 0x0020
+#define POSTMASK_RELAY_MODE BIT(0)
+#define DISP_POSTMASK_SIZE 0x0030
+
+struct mtk_disp_postmask_data {
+ u32 reserved;
+};
+
+/**
+ * struct mtk_disp_postmask - DISP_postmask driver structure
+ * @ddp_comp - structure containing type enum and hardware resources
+ * @crtc - associated crtc to report irq events to
+ */
+struct mtk_disp_postmask {
+ struct mtk_ddp_comp ddp_comp;
+ const struct mtk_disp_postmask_data *data;
+};
+
+static inline struct mtk_disp_postmask *comp_to_postmask(struct mtk_ddp_comp *comp)
+{
+ return container_of(comp, struct mtk_disp_postmask, ddp_comp);
+}
+
+static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,
+ unsigned int h, unsigned int vrefresh,
+ unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+ mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
+ mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, comp, DISP_POSTMASK_CFG);
+}
+
+static void mtk_postmask_start(struct mtk_ddp_comp *comp)
+{
+ writel(POSTMASK_EN, comp->regs + DISP_POSTMASK_EN);
+}
+
+static void mtk_postmask_stop(struct mtk_ddp_comp *comp)
+{
+ writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
+}
+
+static const struct mtk_ddp_comp_funcs mtk_disp_postmask_funcs = {
+ .config = mtk_postmask_config,
+ .start = mtk_postmask_start,
+ .stop = mtk_postmask_stop,
+};
+
+static int mtk_disp_postmask_bind(struct device *dev, struct device *master, void *data)
+{
+ struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
+ struct drm_device *drm_dev = data;
+ int ret;
+
+ ret = mtk_ddp_comp_register(drm_dev, &priv->ddp_comp);
+ if (ret < 0) {
+ dev_err(dev, "Failed to register component %pOF: %d\n",
+ dev->of_node, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void mtk_disp_postmask_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
+ struct drm_device *drm_dev = data;
+
+ mtk_ddp_comp_unregister(drm_dev, &priv->ddp_comp);
+}
+
+static const struct component_ops mtk_disp_postmask_component_ops = {
+ .bind = mtk_disp_postmask_bind,
+ .unbind = mtk_disp_postmask_unbind,
+};
+
+static int mtk_disp_postmask_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mtk_disp_postmask *priv;
+ int comp_id;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_POSTMASK);
+ if (comp_id < 0) {
+ dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
+ return comp_id;
+ }
+
+ ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
+ &mtk_disp_postmask_funcs);
+ if (ret) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to initialize component: %d\n",
+ ret);
+
+ return ret;
+ }
+
+ priv->data = of_device_get_match_data(dev);
+
+ platform_set_drvdata(pdev, priv);
+
+ pm_runtime_enable(dev);
+
+ ret = component_add(dev, &mtk_disp_postmask_component_ops);
+ if (ret)
+ dev_err(dev, "Failed to add component: %d\n", ret);
+
+ return ret;
+}
+
+static int mtk_disp_postmask_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+
+ component_del(&pdev->dev, &mtk_disp_postmask_component_ops);
+
+ return 0;
+}
+
+static const struct of_device_id mtk_disp_postmask_driver_dt_match[] = {
+ {},
+};
+MODULE_DEVICE_TABLE(of, mtk_disp_postmask_driver_dt_match);
+
+struct platform_driver mtk_disp_postmask_driver = {
+ .probe = mtk_disp_postmask_probe,
+ .remove = mtk_disp_postmask_remove,
+ .driver = {
+ .name = "mediatek-disp-postmask",
+ .owner = THIS_MODULE,
+ .of_match_table = mtk_disp_postmask_driver_dt_match,
+ },
+};
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index a715127..bc6b10a 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -354,6 +354,7 @@ static void mtk_dither_stop(struct mtk_ddp_comp *comp)
[MTK_DISP_MUTEX] = "mutex",
[MTK_DISP_OD] = "od",
[MTK_DISP_BLS] = "bls",
+ [MTK_DISP_POSTMASK] = "postmask",
};
struct mtk_ddp_comp_match {
@@ -384,6 +385,7 @@ struct mtk_ddp_comp_match {
[DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, NULL },
[DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, NULL },
[DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, NULL },
+ [DDP_COMPONENT_POSTMASK0] = { MTK_DISP_POSTMASK, 0, NULL },
[DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL },
[DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL },
[DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL },
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index 178fae9..0b23b5c 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -29,6 +29,7 @@ enum mtk_ddp_comp_type {
MTK_DISP_UFOE,
MTK_DSI,
MTK_DPI,
+ MTK_DISP_POSTMASK,
MTK_DISP_PWM,
MTK_DISP_MUTEX,
MTK_DISP_OD,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index b6e963e..bc205e9 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -533,7 +533,7 @@ static int mtk_drm_probe(struct platform_device *pdev)
private->comp_node[comp_id] = of_node_get(node);
/*
- * Currently only the COLOR, GAMMA, OVL, RDMA, DSI, and DPI blocks have
+ * Currently only the COLOR, GAMMA, OVL, POSTMASK, RDMA, DSI, and DPI blocks have
* separate component platform drivers and initialize their own
* DDP component structure. The others are initialized here.
*/
@@ -541,6 +541,7 @@ static int mtk_drm_probe(struct platform_device *pdev)
comp_type == MTK_DISP_GAMMA ||
comp_type == MTK_DISP_OVL ||
comp_type == MTK_DISP_OVL_2L ||
+ comp_type == MTK_DISP_POSTMASK ||
comp_type == MTK_DISP_RDMA ||
comp_type == MTK_DSI ||
comp_type == MTK_DPI) {
@@ -654,6 +655,7 @@ static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
&mtk_disp_color_driver,
&mtk_disp_gamma_driver,
&mtk_disp_ovl_driver,
+ &mtk_disp_postmask_driver,
&mtk_disp_rdma_driver,
&mtk_dpi_driver,
&mtk_drm_platform_driver,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index bbd362b..8a9544b 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -50,6 +50,7 @@ struct mtk_drm_private {
extern struct platform_driver mtk_disp_color_driver;
extern struct platform_driver mtk_disp_gamma_driver;
extern struct platform_driver mtk_disp_ovl_driver;
+extern struct platform_driver mtk_disp_postmask_driver;
extern struct platform_driver mtk_disp_rdma_driver;
extern struct platform_driver mtk_dpi_driver;
extern struct platform_driver mtk_dsi_driver;
--
1.8.1.1.dirty
next prev parent reply other threads:[~2021-01-11 7:45 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-11 7:43 [PATCH v3, 00/15] drm/mediatek: add support for mediatek SOC MT8192 Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 01/15] dt-bindings: mediatek: add description for postmask Yongqiang Niu
2021-01-11 23:30 ` Chun-Kuang Hu
2021-01-14 19:11 ` Rob Herring
2021-01-14 22:29 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 02/15] dt-bindings: mediatek: add description for mt8192 display Yongqiang Niu
2021-01-11 23:39 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 03/15] arm64: dts: mt8192: add display node Yongqiang Niu
2021-01-11 23:41 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 04/15] drm/mediatek: add component OVL_2L2 Yongqiang Niu
2021-01-11 23:45 ` Chun-Kuang Hu
2021-01-11 7:43 ` Yongqiang Niu [this message]
2021-01-11 23:49 ` [PATCH v3, 05/15] drm/mediatek: add component POSTMASK Chun-Kuang Hu
2021-01-26 7:41 ` Hsin-Yi Wang
2021-01-11 7:43 ` [PATCH v3, 06/15] drm/mediatek: add component RDMA4 Yongqiang Niu
2021-01-11 23:50 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 07/15] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase Yongqiang Niu
2021-01-11 23:59 ` Chun-Kuang Hu
2021-01-28 0:43 ` Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 08/15] drm/mediatek: check if fb is null Yongqiang Niu
2021-01-12 0:20 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 09/15] drm/mediatek: Add pm runtime support for gamma Yongqiang Niu
2021-01-12 23:09 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 10/15] drm/mediatek: Add pm runtime support for color Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 11/15] drm/mediatek: fix aal size config Yongqiang Niu
2021-01-14 22:55 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 12/15] drm/mediatek: separate ccorr module Yongqiang Niu
2021-01-12 23:15 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 13/15] drm/mediatek: add matrix bits private data for ccorr Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 14/15] drm/mediatek: add DDP support for MT8192 Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 15/15] drm/mediatek: add support for mediatek SOC MT8192 Yongqiang Niu
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