From: Zhangfei Gao <zhangfei.gao@linaro.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Arnd Bergmann <arnd@arndb.de>,
jean-philippe <jean-philippe@linaro.org>,
kenneth-lee-2012@foxmail.com, wangzhou1@hisilicon.com
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Zhangfei Gao <zhangfei.gao@linaro.org>
Subject: [PATCH] PCI: Add a quirk to enable SVA for HiSilicon chip
Date: Tue, 12 Jan 2021 14:49:52 +0800 [thread overview]
Message-ID: <1610434192-27995-1-git-send-email-zhangfei.gao@linaro.org> (raw)
In-Reply-To: <20201217203806.GA20785@bjorn-Precision-5520>
HiSilicon KunPeng920 and KunPeng930 have devices appear as PCI but are
actually on the AMBA bus. These fake PCI devices can not support tlp
and have to enable SMMU stall mode to use the SVA feature.
Add a quirk to set dma-can-stall property and enable tlp for these devices.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
---
Property dma-can-stall depends on patchset
https://lore.kernel.org/linux-iommu/20210108145217.2254447-1-jean-philippe@linaro.org/
drivers/pci/quirks.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 653660e..a27f327 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1825,6 +1825,31 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quir
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_HUAWEI, 0x1610, PCI_CLASS_BRIDGE_PCI, 8, quirk_pcie_mch);
+static void quirk_huawei_pcie_sva(struct pci_dev *pdev)
+{
+ struct property_entry properties[] = {
+ PROPERTY_ENTRY_BOOL("dma-can-stall"),
+ {},
+ };
+
+ if ((pdev->revision != 0x21) && (pdev->revision != 0x30))
+ return;
+
+ pdev->eetlp_prefix_path = 1;
+
+ /* Device-tree can set the stall property */
+ if (!pdev->dev.of_node &&
+ device_add_properties(&pdev->dev, properties))
+ pci_warn(pdev, "could not add stall property");
+}
+
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva);
+
/*
* It's possible for the MSI to get corrupted if SHPC and ACPI are used
* together on certain PXH-based systems.
--
2.7.4
next prev parent reply other threads:[~2021-01-12 6:51 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-26 11:49 [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Zhangfei Gao
2020-05-26 11:49 ` [PATCH 1/2] PCI: " Zhangfei Gao
2020-05-26 14:46 ` Christoph Hellwig
2020-05-26 15:09 ` Zhangfei Gao
2020-05-27 9:01 ` Greg Kroah-Hartman
2020-05-26 11:49 ` [PATCH 2/2] iommu: calling pci_fixup_iommu in iommu_fwspec_init Zhangfei Gao
2020-05-27 9:01 ` Greg Kroah-Hartman
2020-05-28 6:53 ` Zhangfei Gao
2020-05-27 9:00 ` [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Greg Kroah-Hartman
2020-05-27 9:53 ` Arnd Bergmann
2020-05-27 13:51 ` Zhangfei Gao
2020-05-27 18:18 ` Bjorn Helgaas
2020-05-28 6:46 ` Zhangfei Gao
2020-05-28 7:33 ` Joerg Roedel
2020-06-01 17:41 ` Bjorn Helgaas
2020-06-04 13:33 ` Zhangfei Gao
2020-06-05 23:19 ` Bjorn Helgaas
2020-06-08 2:54 ` Zhangfei Gao
2020-06-08 16:41 ` Bjorn Helgaas
2020-06-09 4:01 ` Zhangfei Gao
2020-06-09 9:15 ` Arnd Bergmann
2020-06-09 16:49 ` Bjorn Helgaas
2020-06-11 2:54 ` Zhangfei Gao
2020-06-11 13:44 ` Bjorn Helgaas
2020-06-13 14:30 ` Zhangfei Gao
2020-06-15 23:52 ` Bjorn Helgaas
2020-06-19 2:26 ` Zhangfei Gao
2020-06-23 15:04 ` Bjorn Helgaas
2020-12-16 11:24 ` Zhou Wang
2020-12-17 20:38 ` Bjorn Helgaas
2021-01-12 6:49 ` Zhangfei Gao [this message]
2021-01-12 17:02 ` [PATCH] PCI: Add a quirk to enable SVA for HiSilicon chip Bjorn Helgaas
2021-01-13 12:05 ` Zhangfei Gao
2021-01-13 14:39 ` Jean-Philippe Brucker
2020-06-22 11:55 ` [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Joerg Roedel
2020-06-23 7:48 ` Zhangfei Gao
2020-06-22 11:53 ` Joerg Roedel
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