[PATCH V2 0/4] imx esdhc dt/driver update

[PATCH V2 0/4] imx esdhc dt/driver update

[peng.fan]

From: Peng Fan <peng.fan@nxp.com>

Patch V2:
 patch 1, 2, 3 is new
 patch 4 is not changed

Peng Fan (4):
  dt-bindings: mmc: fsl-imx-esdhc: add pinctrl bindings
  dt-bindings: mmc: fsl-imx-esdhc: add clock bindings
  arm64: dts: imx8qxp: correct usdhc clock-names sequence
  mmc: sdhci-esdhc-imx: validate pinctrl before use it

 .../bindings/mmc/fsl-imx-esdhc.yaml           | 36 +++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 18 +++++-----
 drivers/mmc/host/sdhci-esdhc-imx.c            |  2 +-
 3 files changed, 46 insertions(+), 10 deletions(-)

-- 
2.28.0

[PATCH V2 1/4] dt-bindings: mmc: fsl-imx-esdhc: add pinctrl bindings

[peng.fan]

From: Peng Fan <peng.fan@nxp.com>

Add pinctrl bindings for fsl-imx-esdhc yaml

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../bindings/mmc/fsl-imx-esdhc.yaml           | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
index 802c9df23752..f91e97cd7d4e 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
+++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
@@ -103,6 +103,31 @@ properties:
       Only eMMC HS400 mode need to take care of this property.
     default: 0
 
+  pinctrl-0:
+    minItems: 1
+    maxItems: 2
+
+  pinctrl-1:
+    minItems: 1
+    maxItems: 2
+
+  pinctrl-2:
+    minItems: 1
+    maxItems: 2
+
+  pinctrl-3:
+    minItems: 1
+    maxItems: 2
+
+  pinctrl-names:
+    minItems: 1
+    maxItems: 4
+    items:
+      - const: default
+      - const: state_100mhz
+      - const: state_200mhz
+      - const: sleep
+
 required:
   - compatible
   - reg
-- 
2.28.0

[PATCH V2 2/4] dt-bindings: mmc: fsl-imx-esdhc: add clock bindings

[peng.fan]

From: Peng Fan <peng.fan@nxp.com>

Add clock bindings for fsl-imx-esdhc yaml

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
index f91e97cd7d4e..c42a3880abf0 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
+++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
@@ -103,6 +103,17 @@ properties:
       Only eMMC HS400 mode need to take care of this property.
     default: 0
 
+  clocks:
+    maxItems: 3
+    description:
+      Handle clocks for the sdhc controller.
+
+  clock-names:
+    items:
+      - const: ipg
+      - const: ahb
+      - const: per
+
   pinctrl-0:
     minItems: 1
     maxItems: 2
-- 
2.28.0

[PATCH V2 3/4] arm64: dts: imx8qxp: correct usdhc clock-names sequence

[peng.fan]

From: Peng Fan <peng.fan@nxp.com>

Per dt-bindings, the clock-names sequence should be ipg ahb per to pass
dtbs_check.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index e46faac1fe71..1d522de7b017 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -366,9 +366,9 @@ usdhc1: mmc@5b010000 {
 			interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
 			reg = <0x5b010000 0x10000>;
 			clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC0_IPG_CLK>,
-				 <&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>,
-				 <&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>;
-			clock-names = "ipg", "per", "ahb";
+				 <&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>,
+				 <&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>;
+			clock-names = "ipg", "ahb", "per";
 			power-domains = <&pd IMX_SC_R_SDHC_0>;
 			status = "disabled";
 		};
@@ -378,9 +378,9 @@ usdhc2: mmc@5b020000 {
 			interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
 			reg = <0x5b020000 0x10000>;
 			clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC1_IPG_CLK>,
-				 <&conn_lpcg IMX_CONN_LPCG_SDHC1_PER_CLK>,
-				 <&conn_lpcg IMX_CONN_LPCG_SDHC1_HCLK>;
-			clock-names = "ipg", "per", "ahb";
+				 <&conn_lpcg IMX_CONN_LPCG_SDHC1_HCLK>,
+				 <&conn_lpcg IMX_CONN_LPCG_SDHC1_PER_CLK>;
+			clock-names = "ipg", "ahb", "per";
 			power-domains = <&pd IMX_SC_R_SDHC_1>;
 			fsl,tuning-start-tap = <20>;
 			fsl,tuning-step= <2>;
@@ -392,9 +392,9 @@ usdhc3: mmc@5b030000 {
 			interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
 			reg = <0x5b030000 0x10000>;
 			clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC2_IPG_CLK>,
-				 <&conn_lpcg IMX_CONN_LPCG_SDHC2_PER_CLK>,
-				 <&conn_lpcg IMX_CONN_LPCG_SDHC2_HCLK>;
-			clock-names = "ipg", "per", "ahb";
+				 <&conn_lpcg IMX_CONN_LPCG_SDHC2_HCLK>,
+				 <&conn_lpcg IMX_CONN_LPCG_SDHC2_PER_CLK>;
+			clock-names = "ipg", "ahb", "per";
 			power-domains = <&pd IMX_SC_R_SDHC_2>;
 			status = "disabled";
 		};
-- 
2.28.0

[PATCH V2 4/4] mmc: sdhci-esdhc-imx: validate pinctrl before use it

[peng.fan]

From: Peng Fan <peng.fan@nxp.com>

When imx_data->pinctrl is not a valid pointer, pinctrl_lookup_state
will trigger kernel panic.

When we boot Dual OS on Jailhouse hypervisor, we let the 1st Linux to
configure pinmux ready for the 2nd OS, so the 2nd OS not have pinctrl
settings.

Similar to this commit b62eee9f804e ("mmc: sdhci-esdhc-imx: no fail when no pinctrl available").

Reviewed-by: Bough Chen <haobo.chen@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/mmc/host/sdhci-esdhc-imx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 16ed19f47939..11d3a2244b36 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -1488,7 +1488,7 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
 
 	mmc_of_parse_voltage(np, &host->ocr_mask);
 
-	if (esdhc_is_usdhc(imx_data)) {
+	if (esdhc_is_usdhc(imx_data) && !IS_ERR(imx_data->pinctrl)) {
 		imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
 						ESDHC_PINCTRL_STATE_100MHZ);
 		imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
-- 
2.28.0

Re: [PATCH V2 2/4] dt-bindings: mmc: fsl-imx-esdhc: add clock bindings

[Rob Herring]

On Thu, 21 Jan 2021 11:09:51 +0800, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add clock bindings for fsl-imx-esdhc yaml
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.example.dt.yaml: mmc@5b010000: clock-names:1: 'ahb' was expected
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.example.dt.yaml: mmc@5b010000: clock-names:2: 'per' was expected
	From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml

See https://patchwork.ozlabs.org/patch/1429619

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

RE: [PATCH V2 2/4] dt-bindings: mmc: fsl-imx-esdhc: add clock bindings

[Peng Fan]

Hi Rob,

> Subject: Re: [PATCH V2 2/4] dt-bindings: mmc: fsl-imx-esdhc: add clock
> bindings
> 
> On Thu, 21 Jan 2021 11:09:51 +0800, peng.fan@nxp.com wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Add clock bindings for fsl-imx-esdhc yaml
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11
> +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> 
> My bot found errors running 'make dt_binding_check' on your patch:

Patch 3/4 addresses the dts, actually I think it is the dts not use correct
clock order.

Thanks,
Peng.

> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock
> /imx8qxp-lpcg.example.dt.yaml: mmc@5b010000: clock-names:1: 'ahb' was
> expected
> 	From schema:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mmc
> /fsl-imx-esdhc.yaml
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock
> /imx8qxp-lpcg.example.dt.yaml: mmc@5b010000: clock-names:2: 'per' was
> expected
> 	From schema:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mmc
> /fsl-imx-esdhc.yaml
> 
> See
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch
> work.ozlabs.org%2Fpatch%2F1429619&amp;data=04%7C01%7Cpeng.fan%40
> nxp.com%7Cc543c002a0b54348d48408d8be25ec0b%7C686ea1d3bc2b4c6fa
> 92cd99c5c301635%7C0%7C0%7C637468417375412086%7CUnknown%7CT
> WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLC
> JXVCI6Mn0%3D%7C1000&amp;sdata=cISWAn3kYIoqvxr39Mu5NL6rwkebmk
> VN1drRi%2BDNwAs%3D&amp;reserved=0
> 
> This check can fail if there are any dependencies. The base for a patch series
> is generally the most recent rc1.
> 
> If you already ran 'make dt_binding_check' and didn't see the above error(s),
> then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit.

Re: [PATCH V2 2/4] dt-bindings: mmc: fsl-imx-esdhc: add clock bindings

[Rob Herring]

On Thu, Jan 21, 2021 at 6:55 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> Hi Rob,
>
> > Subject: Re: [PATCH V2 2/4] dt-bindings: mmc: fsl-imx-esdhc: add clock
> > bindings
> >
> > On Thu, 21 Jan 2021 11:09:51 +0800, peng.fan@nxp.com wrote:
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > Add clock bindings for fsl-imx-esdhc yaml
> > >
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > >  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11
> > +++++++++++
> > >  1 file changed, 11 insertions(+)
> > >
> >
> > My bot found errors running 'make dt_binding_check' on your patch:
>
> Patch 3/4 addresses the dts, actually I think it is the dts not use correct
> clock order.

These errors are on the example.

Rob

Re: [PATCH V2 1/4] dt-bindings: mmc: fsl-imx-esdhc: add pinctrl bindings

[Rob Herring]

On Thu, Jan 21, 2021 at 11:09:50AM +0800, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add pinctrl bindings for fsl-imx-esdhc yaml
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../bindings/mmc/fsl-imx-esdhc.yaml           | 25 +++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> index 802c9df23752..f91e97cd7d4e 100644
> --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> @@ -103,6 +103,31 @@ properties:
>        Only eMMC HS400 mode need to take care of this property.
>      default: 0
>  
> +  pinctrl-0:
> +    minItems: 1
> +    maxItems: 2
> +
> +  pinctrl-1:
> +    minItems: 1
> +    maxItems: 2
> +
> +  pinctrl-2:
> +    minItems: 1
> +    maxItems: 2
> +
> +  pinctrl-3:
> +    minItems: 1
> +    maxItems: 2

You can drop these. They are automatically added and there's not 
anything additional to describe here that's useful.

> +
> +  pinctrl-names:
> +    minItems: 1
> +    maxItems: 4
> +    items:
> +      - const: default
> +      - const: state_100mhz
> +      - const: state_200mhz
> +      - const: sleep

This should stay since you are defining the names.

Rob

RE: [PATCH V2 0/4] imx esdhc dt/driver update

[Peng Fan]

> Subject: [PATCH V2 0/4] imx esdhc dt/driver update

Gentle ping..

Thanks,
Peng.

> 
> From: Peng Fan <peng.fan@nxp.com>
> 
> Patch V2:
>  patch 1, 2, 3 is new
>  patch 4 is not changed
> 
> Peng Fan (4):
>   dt-bindings: mmc: fsl-imx-esdhc: add pinctrl bindings
>   dt-bindings: mmc: fsl-imx-esdhc: add clock bindings
>   arm64: dts: imx8qxp: correct usdhc clock-names sequence
>   mmc: sdhci-esdhc-imx: validate pinctrl before use it
> 
>  .../bindings/mmc/fsl-imx-esdhc.yaml           | 36
> +++++++++++++++++++
>  arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 18 +++++-----
>  drivers/mmc/host/sdhci-esdhc-imx.c            |  2 +-
>  3 files changed, 46 insertions(+), 10 deletions(-)
> 
> --
> 2.28.0

Re: [PATCH V2 0/4] imx esdhc dt/driver update

[Ulf Hansson]

On Sun, 7 Feb 2021 at 14:10, Peng Fan <peng.fan@nxp.com> wrote:
>
> > Subject: [PATCH V2 0/4] imx esdhc dt/driver update
>
> Gentle ping..

I was expecting a new version from you to address the comment on the
DT bindings from Rob.

Otherwise this looks good to me.

Kind regards
Uffe

>
> Thanks,
> Peng.
>
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Patch V2:
> >  patch 1, 2, 3 is new
> >  patch 4 is not changed
> >
> > Peng Fan (4):
> >   dt-bindings: mmc: fsl-imx-esdhc: add pinctrl bindings
> >   dt-bindings: mmc: fsl-imx-esdhc: add clock bindings
> >   arm64: dts: imx8qxp: correct usdhc clock-names sequence
> >   mmc: sdhci-esdhc-imx: validate pinctrl before use it
> >
> >  .../bindings/mmc/fsl-imx-esdhc.yaml           | 36
> > +++++++++++++++++++
> >  arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 18 +++++-----
> >  drivers/mmc/host/sdhci-esdhc-imx.c            |  2 +-
> >  3 files changed, 46 insertions(+), 10 deletions(-)
> >
> > --
> > 2.28.0
>