From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A93B8C433E0 for ; Mon, 1 Feb 2021 04:01:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E9D264E13 for ; Mon, 1 Feb 2021 04:01:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231446AbhBAEBC (ORCPT ); Sun, 31 Jan 2021 23:01:02 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:58803 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229842AbhBAEBA (ORCPT ); Sun, 31 Jan 2021 23:01:00 -0500 X-UUID: ac29774ef4cd4bdaa2cb169040adf842-20210201 X-UUID: ac29774ef4cd4bdaa2cb169040adf842-20210201 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2015456961; Mon, 01 Feb 2021 12:00:15 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 1 Feb 2021 12:00:13 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 1 Feb 2021 12:00:13 +0800 From: To: Srinivas Kandagatla , Rob Herring , Matthias Brugger CC: Seiya Wang , , , , , Andrew-CT Chen , Ryan Wu Subject: [PATCH v4 1/2] dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC Date: Mon, 1 Feb 2021 11:59:45 +0800 Message-ID: <1612151986-19820-2-git-send-email-Yz.Wu@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1612151986-19820-1-git-send-email-Yz.Wu@mediatek.com> References: <1612151986-19820-1-git-send-email-Yz.Wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: A9B9CF9EC05C6A67E539CEFFE0CBC3AEB744CEDD3B1C5646FDE5AF1DE18CBE7F2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ryan Wu This updates dt-binding documentation for MediaTek mt8192 Signed-off-by: Ryan Wu --- This patch is based on v5.10-rc7. --- Documentation/devicetree/bindings/nvmem/mtk-efuse.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt b/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt index 0668c45..82dafa3 100644 --- a/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt +++ b/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt @@ -7,6 +7,7 @@ Required properties: "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173 + "mediatek,mt8192-efuse", "mediatek,efuse": for MT8192 - reg: Should contain registers location and length = Data cells = -- 2.6.4