From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2F12C433DB for ; Mon, 8 Feb 2021 09:19:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 95E0E64E92 for ; Mon, 8 Feb 2021 09:19:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231565AbhBHJRw (ORCPT ); Mon, 8 Feb 2021 04:17:52 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:12527 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230499AbhBHI7Z (ORCPT ); Mon, 8 Feb 2021 03:59:25 -0500 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4DZ0JS4BXYzMWHP; Mon, 8 Feb 2021 16:56:56 +0800 (CST) Received: from huawei.com (10.69.192.56) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.498.0; Mon, 8 Feb 2021 16:58:35 +0800 From: Luo Jiaxing To: , , , , , CC: , , Subject: [PATCH for next v1 1/2] gpio: omap: Replace raw_spin_lock_irqsave with raw_spin_lock in omap_gpio_irq_handler() Date: Mon, 8 Feb 2021 16:57:56 +0800 Message-ID: <1612774677-56758-2-git-send-email-luojiaxing@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612774677-56758-1-git-send-email-luojiaxing@huawei.com> References: <1612774677-56758-1-git-send-email-luojiaxing@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There is no need to use API with _irqsave in omap_gpio_irq_handler(), because it already be in a irq-disabled context. Signed-off-by: Luo Jiaxing --- drivers/gpio/gpio-omap.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 41952bb..dc8bbf4 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -560,8 +560,6 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) u32 enabled, isr, edge; unsigned int bit; struct gpio_bank *bank = gpiobank; - unsigned long wa_lock_flags; - unsigned long lock_flags; isr_reg = bank->base + bank->regs->irqstatus; if (WARN_ON(!isr_reg)) @@ -572,7 +570,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) return IRQ_NONE; while (1) { - raw_spin_lock_irqsave(&bank->lock, lock_flags); + raw_spin_lock(&bank->lock); enabled = omap_get_gpio_irqbank_mask(bank); isr = readl_relaxed(isr_reg) & enabled; @@ -586,7 +584,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) if (edge) omap_clear_gpio_irqbank(bank, edge); - raw_spin_unlock_irqrestore(&bank->lock, lock_flags); + raw_spin_unlock(&bank->lock); if (!isr) break; @@ -595,7 +593,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) bit = __ffs(isr); isr &= ~(BIT(bit)); - raw_spin_lock_irqsave(&bank->lock, lock_flags); + raw_spin_lock(&bank->lock); /* * Some chips can't respond to both rising and falling * at the same time. If this irq was requested with @@ -606,15 +604,14 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) if (bank->toggle_mask & (BIT(bit))) omap_toggle_gpio_edge_triggering(bank, bit); - raw_spin_unlock_irqrestore(&bank->lock, lock_flags); + raw_spin_unlock(&bank->lock); - raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); + raw_spin_lock(&bank->wa_lock); generic_handle_irq(irq_find_mapping(bank->chip.irq.domain, bit)); - raw_spin_unlock_irqrestore(&bank->wa_lock, - wa_lock_flags); + raw_spin_unlock(&bank->wa_lock); } } exit: -- 2.7.4