From: Stephen Boyd <sboyd@kernel.org>
To: Dinh Nguyen <dinguyen@kernel.org>
Cc: dinguyen@kernel.org, mturquette@baylibre.com,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] clk: socfpga: use clk_hw_register for a5/c5
Date: Tue, 30 Mar 2021 19:31:50 -0700 [thread overview]
Message-ID: <161715791030.2260335.4564887946747756314@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20210302214151.1333447-1-dinguyen@kernel.org>
Quoting Dinh Nguyen (2021-03-02 13:41:49)
> As recommended by Stephen Boyd, convert the cyclone5/arria5 clock driver
> to use the clk_hw registration method.
>
> Suggested-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
Applied to clk-next
prev parent reply other threads:[~2021-03-31 2:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-02 21:41 [PATCH 1/3] clk: socfpga: use clk_hw_register for a5/c5 Dinh Nguyen
2021-03-02 21:41 ` [PATCH 2/3] clk: socfpga: arria10: convert to use clk_hw Dinh Nguyen
2021-03-31 2:31 ` Stephen Boyd
2021-03-02 21:41 ` [PATCH 3/3] clk: socfpga: Convert to s10/agilex/n5x " Dinh Nguyen
2021-03-31 2:32 ` Stephen Boyd
2021-03-31 2:31 ` Stephen Boyd [this message]
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