From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org Cc: acme@kernel.org, tglx@linutronix.de, bp@alien8.de, namhyung@kernel.org, jolsa@redhat.com, ak@linux.intel.com, yao.jin@linux.intel.com, alexander.shishkin@linux.intel.com, adrian.hunter@intel.com, ricardo.neri-calderon@linux.intel.com, Andy Lutomirski <luto@kernel.org>, Dave Hansen <dave.hansen@intel.com>, Kan Liang <kan.liang@linux.intel.com>, "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>, "Ravi V. Shankar" <ravi.v.shankar@intel.com>, Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Subject: [PATCH V6 02/25] x86/cpu: Add helper function to get the type of the current hybrid CPU Date: Mon, 12 Apr 2021 07:30:42 -0700 [thread overview] Message-ID: <1618237865-33448-3-git-send-email-kan.liang@linux.intel.com> (raw) In-Reply-To: <1618237865-33448-1-git-send-email-kan.liang@linux.intel.com> From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> On processors with Intel Hybrid Technology (i.e., one having more than one type of CPU in the same package), all CPUs support the same instruction set and enumerate the same features on CPUID. Thus, all software can run on any CPU without restrictions. However, there may be model-specific differences among types of CPUs. For instance, each type of CPU may support a different number of performance counters. Also, machine check error banks may be wired differently. Even though most software will not care about these differences, kernel subsystems dealing with these differences must know. Add and expose a new helper function get_this_hybrid_cpu_type() to query the type of the current hybrid CPU. The function will be used later in the perf subsystem. The Intel Software Developer's Manual defines the CPU type as 8-bit identifier. Cc: Andi Kleen <ak@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org> Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Cc: "Ravi V. Shankar" <ravi.v.shankar@intel.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Cc: linux-kernel@vger.kernel.org Reviewed-by: Len Brown <len.brown@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> --- Changes since v5 (as part of patchset for perf change for Alderlake) * None Changes since v4 (as part of patchset for perf change for Alderlake) * Put the X86_HYBRID_CPU_TYPE_ID_SHIFT over the function where it is used (Boris) * Add Acked-by Changes since v3 (as part of patchset for perf change for Alderlake) * None Changes since v2 (as part of patchset for perf change for Alderlake) * Use get_this_hybrid_cpu_type() to replace get_hybrid_cpu_type() to avoid the trouble of IPIs. The new function retrieves the type of the current hybrid CPU. It's good enough for perf. (Dave) * Remove definitions for Atom and Core CPU types. Perf will define a enum for the hybrid CPU type in the perf_event.h (Peter) * Remove X86_HYBRID_CPU_NATIVE_MODEL_ID_MASK. Not used in the patch set. (Kan) * Update the description accordingly. (Boris) Changes since v1 (as part of patchset for perf change for Alderlake) * Removed cpuinfo_x86.x86_cpu_type. It can be added later if needed. Instead, implement helper functions that subsystems can use.(Boris) * Add definitions for Atom and Core CPU types. (Kan) Changes since v1 (in a separate posting) * Simplify code by using cpuid_eax(). (Boris) * Reworded the commit message to clarify the concept of Intel Hybrid Technology. Stress that all CPUs can run the same instruction set and support the same features. --- arch/x86/include/asm/cpu.h | 6 ++++++ arch/x86/kernel/cpu/intel.c | 16 ++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index da78ccb..610905d 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -45,6 +45,7 @@ extern void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c); extern void switch_to_sld(unsigned long tifn); extern bool handle_user_split_lock(struct pt_regs *regs, long error_code); extern bool handle_guest_split_lock(unsigned long ip); +u8 get_this_hybrid_cpu_type(void); #else static inline void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c) {} static inline void switch_to_sld(unsigned long tifn) {} @@ -57,6 +58,11 @@ static inline bool handle_guest_split_lock(unsigned long ip) { return false; } + +static inline u8 get_this_hybrid_cpu_type(void) +{ + return 0; +} #endif #ifdef CONFIG_IA32_FEAT_CTL void init_ia32_feat_ctl(struct cpuinfo_x86 *c); diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 0e422a5..26fb626 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -1195,3 +1195,19 @@ void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c) cpu_model_supports_sld = true; split_lock_setup(); } + +#define X86_HYBRID_CPU_TYPE_ID_SHIFT 24 + +/** + * get_this_hybrid_cpu_type() - Get the type of this hybrid CPU + * + * Returns the CPU type [31:24] (i.e., Atom or Core) of a CPU in + * a hybrid processor. If the processor is not hybrid, returns 0. + */ +u8 get_this_hybrid_cpu_type(void) +{ + if (!cpu_feature_enabled(X86_FEATURE_HYBRID_CPU)) + return 0; + + return cpuid_eax(0x0000001a) >> X86_HYBRID_CPU_TYPE_ID_SHIFT; +} -- 2.7.4
next prev parent reply other threads:[~2021-04-12 14:38 UTC|newest] Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-12 14:30 [PATCH V6 00/25] Add Alder Lake support for perf (kernel) kan.liang 2021-04-12 14:30 ` [PATCH V6 01/25] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Ricardo Neri 2021-04-12 14:30 ` kan.liang [this message] 2021-04-20 10:46 ` [tip: perf/core] x86/cpu: Add helper function to get the type of the current hybrid CPU tip-bot2 for Ricardo Neri 2021-04-12 14:30 ` [PATCH V6 03/25] perf/x86: Track pmu in per-CPU cpu_hw_events kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 04/25] perf/x86/intel: Hybrid PMU support for perf capabilities kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 05/25] perf/x86: Hybrid PMU support for intel_ctrl kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 06/25] perf/x86: Hybrid PMU support for counters kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 07/25] perf/x86: Hybrid PMU support for unconstrained kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 08/25] perf/x86: Hybrid PMU support for hardware cache event kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 09/25] perf/x86: Hybrid PMU support for event constraints kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 10/25] perf/x86: Hybrid PMU support for extra_regs kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 11/25] perf/x86/intel: Factor out intel_pmu_check_num_counters kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 12/25] perf/x86/intel: Factor out intel_pmu_check_event_constraints kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 13/25] perf/x86/intel: Factor out intel_pmu_check_extra_regs kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 14/25] perf/x86: Remove temporary pmu assignment in event_init kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 15/25] perf/x86: Factor out x86_pmu_show_pmu_cap kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 16/25] perf/x86: Register hybrid PMUs kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 17/25] perf/x86: Add structures for the attributes of Hybrid PMUs kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 18/25] perf/x86/intel: Add attr_update for " kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:30 ` [PATCH V6 19/25] perf/x86: Support filter_match callback kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:31 ` [PATCH V6 20/25] perf/x86/intel: Add Alder Lake Hybrid support kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:31 ` [PATCH V6 21/25] perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:31 ` [PATCH V6 22/25] perf/x86/intel/uncore: Add Alder Lake support kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:31 ` [PATCH V6 23/25] perf/x86/msr: Add Alder Lake CPU support kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:31 ` [PATCH V6 24/25] perf/x86/cstate: " kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Kan Liang 2021-04-12 14:31 ` [PATCH V6 25/25] perf/x86/rapl: Add support for Intel Alder Lake kan.liang 2021-04-20 10:46 ` [tip: perf/core] " tip-bot2 for Zhang Rui
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