From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: linus.walleij@linaro.org, robh+dt@kernel.org, paul@crapouillou.net
Cc: linux-gpio@vger.kernel.org, linux-mips@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
hns@goldelico.com, paul@boddie.org.uk, andy.shevchenko@gmail.com,
dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com,
rick.tyliu@ingenic.com, sernia.zhou@foxmail.com,
siyanteng@loongson.cn
Subject: [PATCH v5 05/11] pinctrl: Ingenic: Reformat the code.
Date: Sat, 17 Apr 2021 00:13:59 +0800 [thread overview]
Message-ID: <1618589645-96504-6-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1618589645-96504-1-git-send-email-zhouyanjie@wanyeetech.com>
1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
2.Add tabs before values to align the code in the macro definition section.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
---
Notes:
v2:
New patch.
v2->v3:
Add Paul Cercueil's Reviewed-by.
v3->v4:
Add Andy Shevchenko's Reviewed-by.
v4->v5:
No change.
drivers/pinctrl/pinctrl-ingenic.c | 71 +++++++++++++++++++--------------------
1 file changed, 35 insertions(+), 36 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
index 8ed62a4..009901b 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b/drivers/pinctrl/pinctrl-ingenic.c
@@ -26,37 +26,48 @@
#include "pinconf.h"
#include "pinmux.h"
-#define GPIO_PIN 0x00
-#define GPIO_MSK 0x20
+#define GPIO_PIN 0x00
+#define GPIO_MSK 0x20
-#define JZ4740_GPIO_DATA 0x10
-#define JZ4740_GPIO_PULL_DIS 0x30
-#define JZ4740_GPIO_FUNC 0x40
-#define JZ4740_GPIO_SELECT 0x50
-#define JZ4740_GPIO_DIR 0x60
-#define JZ4740_GPIO_TRIG 0x70
-#define JZ4740_GPIO_FLAG 0x80
+#define JZ4740_GPIO_DATA 0x10
+#define JZ4740_GPIO_PULL_DIS 0x30
+#define JZ4740_GPIO_FUNC 0x40
+#define JZ4740_GPIO_SELECT 0x50
+#define JZ4740_GPIO_DIR 0x60
+#define JZ4740_GPIO_TRIG 0x70
+#define JZ4740_GPIO_FLAG 0x80
-#define JZ4770_GPIO_INT 0x10
-#define JZ4770_GPIO_PAT1 0x30
-#define JZ4770_GPIO_PAT0 0x40
-#define JZ4770_GPIO_FLAG 0x50
-#define JZ4770_GPIO_PEN 0x70
+#define JZ4770_GPIO_INT 0x10
+#define JZ4770_GPIO_PAT1 0x30
+#define JZ4770_GPIO_PAT0 0x40
+#define JZ4770_GPIO_FLAG 0x50
+#define JZ4770_GPIO_PEN 0x70
-#define X1830_GPIO_PEL 0x110
-#define X1830_GPIO_PEH 0x120
+#define X1830_GPIO_PEL 0x110
+#define X1830_GPIO_PEH 0x120
-#define REG_SET(x) ((x) + 0x4)
-#define REG_CLEAR(x) ((x) + 0x8)
+#define REG_SET(x) ((x) + 0x4)
+#define REG_CLEAR(x) ((x) + 0x8)
-#define REG_PZ_BASE(x) ((x) * 7)
-#define REG_PZ_GID2LD(x) ((x) * 7 + 0xf0)
+#define REG_PZ_BASE(x) ((x) * 7)
+#define REG_PZ_GID2LD(x) ((x) * 7 + 0xf0)
-#define GPIO_PULL_DIS 0
-#define GPIO_PULL_UP 1
-#define GPIO_PULL_DOWN 2
+#define GPIO_PULL_DIS 0
+#define GPIO_PULL_UP 1
+#define GPIO_PULL_DOWN 2
-#define PINS_PER_GPIO_CHIP 32
+#define PINS_PER_GPIO_CHIP 32
+
+#define INGENIC_PIN_GROUP_FUNCS(name, id, funcs) \
+ { \
+ name, \
+ id##_pins, \
+ ARRAY_SIZE(id##_pins), \
+ funcs, \
+ }
+
+#define INGENIC_PIN_GROUP(name, id, func) \
+ INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
enum jz_version {
ID_JZ4740,
@@ -136,18 +147,6 @@ static int jz4740_pwm_pwm5_pins[] = { 0x7c, };
static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
-
-#define INGENIC_PIN_GROUP_FUNCS(name, id, funcs) \
- { \
- name, \
- id##_pins, \
- ARRAY_SIZE(id##_pins), \
- funcs, \
- }
-
-#define INGENIC_PIN_GROUP(name, id, func) \
- INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
-
static const struct group_desc jz4740_groups[] = {
INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit, 0),
INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit, 0),
--
2.7.4
next prev parent reply other threads:[~2021-04-16 16:14 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 16:13 [PATCH v5 00/11] Fix bugs and add support for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-04-16 16:13 ` [PATCH v5 01/11] pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group 周琰杰 (Zhou Yanjie)
2021-04-16 16:13 ` [PATCH v5 02/11] pinctrl: Ingenic: Add support for read the pin configuration of X1830 周琰杰 (Zhou Yanjie)
2021-04-16 16:13 ` [PATCH v5 03/11] pinctrl: Ingenic: Adjust the sequence of X1830 SSI pin groups 周琰杰 (Zhou Yanjie)
2021-04-16 16:13 ` [PATCH v5 04/11] pinctrl: Ingenic: Improve LCD pins related code 周琰杰 (Zhou Yanjie)
2021-04-17 9:38 ` Paul Cercueil
2021-04-16 16:13 ` 周琰杰 (Zhou Yanjie) [this message]
2021-04-16 16:14 ` [PATCH v5 06/11] dt-bindings: pinctrl: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-04-16 16:14 ` [PATCH v5 07/11] pinctrl: Ingenic: Add pinctrl driver for JZ4730 周琰杰 (Zhou Yanjie)
2021-04-17 9:46 ` Paul Cercueil
2021-04-16 16:14 ` [PATCH v5 08/11] pinctrl: Ingenic: Add pinctrl driver for JZ4750 周琰杰 (Zhou Yanjie)
2021-04-17 9:49 ` Paul Cercueil
2021-04-17 12:42 ` Zhou Yanjie
2021-04-16 16:14 ` [PATCH v5 09/11] pinctrl: Ingenic: Add pinctrl driver for JZ4755 周琰杰 (Zhou Yanjie)
2021-04-17 9:51 ` Paul Cercueil
2021-04-16 16:14 ` [PATCH v5 10/11] pinctrl: Ingenic: Add pinctrl driver for JZ4775 周琰杰 (Zhou Yanjie)
2021-04-17 9:52 ` Paul Cercueil
2021-04-16 16:14 ` [PATCH v5 11/11] pinctrl: Ingenic: Add pinctrl driver for X2000 周琰杰 (Zhou Yanjie)
2021-04-17 10:12 ` Paul Cercueil
2021-04-17 12:43 ` Zhou Yanjie
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