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From: Sibi Sankar <sibis@codeaurora.org>
To: bjorn.andersson@linaro.org, dianders@chromium.org, mka@chromium.org
Cc: viresh.kumar@linaro.org, sboyd@kernel.org, agross@kernel.org,
	robh+dt@kernel.org, rjw@rjwysocki.net,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	Sibi Sankar <sibis@codeaurora.org>
Subject: [PATCH v2 1/2] cpufreq: blacklist SC7280 in cpufreq-dt-platdev
Date: Tue,  4 May 2021 12:28:29 +0530
Message-ID: <1620111510-31455-2-git-send-email-sibis@codeaurora.org> (raw)
In-Reply-To: <1620111510-31455-1-git-send-email-sibis@codeaurora.org>

Add SC7280 to cpufreq-dt-platdev blacklist since the actual scaling is
handled by the 'qcom-cpufreq-hw' driver.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 5e07065ec22f..345418b8250e 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -137,6 +137,7 @@ static const struct of_device_id blacklist[] __initconst = {
 	{ .compatible = "qcom,msm8996", },
 	{ .compatible = "qcom,qcs404", },
 	{ .compatible = "qcom,sc7180", },
+	{ .compatible = "qcom,sc7280", },
 	{ .compatible = "qcom,sdm845", },
 
 	{ .compatible = "st,stih407", },
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


  reply index

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-04  6:58 [PATCH v2 0/2] DDR/L3 Scaling support on SC7280 SoCs Sibi Sankar
2021-05-04  6:58 ` Sibi Sankar [this message]
2021-05-04 19:47   ` [PATCH v2 1/2] cpufreq: blacklist SC7280 in cpufreq-dt-platdev Doug Anderson
2021-05-04  6:58 ` [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add cpu OPP tables Sibi Sankar
2021-05-04 20:02   ` Doug Anderson
2021-05-05 10:11     ` Sibi Sankar

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