From: Rajendra Nayak <rnayak@codeaurora.org>
To: ulf.hansson@linaro.org, robh+dt@kernel.org,
bjorn.andersson@linaro.org, viresh.kumar@linaro.org
Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
swboyd@chromium.org, rojay@codeaurora.org,
Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v2 3/3] arm64: dts: sc7180: Add assigned-performance-states for i2c
Date: Thu, 27 May 2021 11:42:29 +0530 [thread overview]
Message-ID: <1622095949-2014-4-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1622095949-2014-1-git-send-email-rnayak@codeaurora.org>
qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz)
Though qup-i2c does not support DVFS, it still needs to vote for a
performance state on 'CX' to satisfy the 19.2 Mhz clock frequency
requirement.
Use 'assigned-performance-states' to pass this information from
device tree, and also add the power-domains property to specify
the cx power-domain.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 6228ba2..7914084 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -786,8 +786,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi0: spi@880000 {
@@ -838,8 +840,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi1: spi@884000 {
@@ -890,8 +894,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart2: serial@888000 {
@@ -924,8 +930,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi3: spi@88c000 {
@@ -976,8 +984,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart4: serial@890000 {
@@ -1010,8 +1020,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi5: spi@894000 {
@@ -1077,8 +1089,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi6: spi@a80000 {
@@ -1129,8 +1143,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart7: serial@a84000 {
@@ -1163,8 +1179,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi8: spi@a88000 {
@@ -1215,8 +1233,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart9: serial@a8c000 {
@@ -1249,8 +1269,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi10: spi@a90000 {
@@ -1301,8 +1323,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi11: spi@a94000 {
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
prev parent reply other threads:[~2021-05-27 6:13 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-27 6:12 [PATCH v2 0/3] PM / Domains: Add support for assigned-performance-states Rajendra Nayak
2021-05-27 6:12 ` [PATCH v2 1/3] dt-bindings: power: Introduce 'assigned-performance-states' property Rajendra Nayak
2021-05-27 6:16 ` Viresh Kumar
2021-05-27 6:21 ` Rajendra Nayak
2021-05-27 14:23 ` Rob Herring
2021-05-27 14:26 ` Rob Herring
2021-06-01 10:33 ` Ulf Hansson
2021-06-01 11:12 ` Stephan Gerhold
2021-06-01 11:44 ` Viresh Kumar
2021-06-02 10:45 ` Ulf Hansson
2021-06-02 10:54 ` Viresh Kumar
2021-06-02 12:50 ` Ulf Hansson
2021-06-15 15:05 ` Ulf Hansson
2021-06-18 6:01 ` Rajendra Nayak
2021-05-27 6:12 ` [PATCH v2 2/3] PM / Domains: Add support for 'assigned-performance-states' Rajendra Nayak
2021-05-27 6:12 ` Rajendra Nayak [this message]
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