From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D2BAC47094 for ; Thu, 10 Jun 2021 08:13:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 56312613F1 for ; Thu, 10 Jun 2021 08:13:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230212AbhFJIP1 (ORCPT ); Thu, 10 Jun 2021 04:15:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230161AbhFJIPS (ORCPT ); Thu, 10 Jun 2021 04:15:18 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39D15C061574; Thu, 10 Jun 2021 01:13:22 -0700 (PDT) Date: Thu, 10 Jun 2021 08:13:18 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1623312799; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QPRLsWDpAS3p/LIfEHZkL1Ek7QN8Qor7KWqFnEhcH1g=; b=vB+SEkRaqihfFcXUnKVDhRkElBcGVBBhM6kxkUxjoFA4NXjiI/oosvRBdsw/Hldn8/ybEQ 7pb9jtE2MxtKYxKadaWSpyzq41ShbfyAzhOGxwwlpBvfX6/ubt08NS3S7hADX0qyt110rV O8vfTyQWapK0KQjzrHlJ4WdMnQkepOY72q3RpI5nt1vqoUWbH0zbvOeoJwfruHX//lwONk xU7zppjEK4Lz+HYdeCytc/VLGA4+DvMqUmbYpocXXQZ0xvEcDHORdhXBdvdFUhGWuc/6Fi U+HYyIJTfNon82oKwx+Tg5gz3+8bW7IgyErXNuSYV/LXz/KQBWv/cFPvQIInKA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1623312799; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QPRLsWDpAS3p/LIfEHZkL1Ek7QN8Qor7KWqFnEhcH1g=; b=vcIBf/cP9p1FA9LFN8Vjgim8WTROoHTTMmOaHCFnX1bpDq+eXFQ1CVD1oYVgmAWuZns1fP KF8rS3WU/soM7UCw== From: "tip-bot2 for CodyYao-oc" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/urgent] x86/nmi_watchdog: Fix old-style NMI watchdog regression on old Intel CPUs Cc: "CodyYao-oc" , Ingo Molnar , "Peter Zijlstra (Intel)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20210607025335.9643-1-CodyYao-oc@zhaoxin.com> References: <20210607025335.9643-1-CodyYao-oc@zhaoxin.com> MIME-Version: 1.0 Message-ID: <162331279824.29796.12682254131606162477.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the perf/urgent branch of tip: Commit-ID: a8383dfb2138742a1bb77b481ada047aededa2ba Gitweb: https://git.kernel.org/tip/a8383dfb2138742a1bb77b481ada047aededa2ba Author: CodyYao-oc AuthorDate: Mon, 07 Jun 2021 10:53:35 +08:00 Committer: Peter Zijlstra CommitterDate: Thu, 10 Jun 2021 10:04:40 +02:00 x86/nmi_watchdog: Fix old-style NMI watchdog regression on old Intel CPUs The following commit: 3a4ac121c2ca ("x86/perf: Add hardware performance events support for Zhaoxin CPU.") Got the old-style NMI watchdog logic wrong and broke it for basically every Intel CPU where it was active. Which is only truly old CPUs, so few people noticed. On CPUs with perf events support we turn off the old-style NMI watchdog, so it was pretty pointless to add the logic for X86_VENDOR_ZHAOXIN to begin with ... :-/ Anyway, the fix is to restore the old logic and add a 'break'. [ mingo: Wrote a new changelog. ] Fixes: 3a4ac121c2ca ("x86/perf: Add hardware performance events support for Zhaoxin CPU.") Signed-off-by: CodyYao-oc Signed-off-by: Ingo Molnar Signed-off-by: Peter Zijlstra (Intel) Link: https://lore.kernel.org/r/20210607025335.9643-1-CodyYao-oc@zhaoxin.com --- arch/x86/kernel/cpu/perfctr-watchdog.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c index 3ef5868..7aecb2f 100644 --- a/arch/x86/kernel/cpu/perfctr-watchdog.c +++ b/arch/x86/kernel/cpu/perfctr-watchdog.c @@ -63,7 +63,7 @@ static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) case 15: return msr - MSR_P4_BPU_PERFCTR0; } - fallthrough; + break; case X86_VENDOR_ZHAOXIN: case X86_VENDOR_CENTAUR: return msr - MSR_ARCH_PERFMON_PERFCTR0; @@ -96,7 +96,7 @@ static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr) case 15: return msr - MSR_P4_BSU_ESCR0; } - fallthrough; + break; case X86_VENDOR_ZHAOXIN: case X86_VENDOR_CENTAUR: return msr - MSR_ARCH_PERFMON_EVENTSEL0;