* [PATCH v3 0/2] Add Ingenic SoCs MAC support.
@ 2021-06-14 17:15 周琰杰 (Zhou Yanjie)
2021-06-14 17:15 ` [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: 周琰杰 (Zhou Yanjie) @ 2021-06-14 17:15 UTC (permalink / raw)
To: davem, kuba, robh+dt, peppe.cavallaro, alexandre.torgue, joabreu,
mcoquelin.stm32, matthias.bgg
Cc: alexandre.torgue, netdev, devicetree, linux-kernel, linux-stm32,
linux-arm-kernel, linux-mediatek, dongsheng.qiu, aric.pzqi,
rick.tyliu, sihui.liu, jun.jiang, sernia.zhou
v2->v3:
1.Add "ingenic,mac.yaml" for Ingenic SoCs.
2.Change tx clk delay and rx clk delay from hardware value to ps.
3.return -EINVAL when a unsupported value is encountered when
parsing the binding.
4.Simplify the code of the RGMII part of X2000 SoC according to
Andrew Lunn’s suggestion.
5.Follow the example of "dwmac-mediatek.c" to improve the code
that handles delays according to Andrew Lunn’s suggestion.
周琰杰 (Zhou Yanjie) (2):
dt-bindings: dwmac: Add bindings for new Ingenic SoCs.
net: stmmac: Add Ingenic SoCs MAC support.
.../devicetree/bindings/net/ingenic,mac.yaml | 76 ++++
.../devicetree/bindings/net/snps,dwmac.yaml | 15 +
drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 +
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
.../net/ethernet/stmicro/stmmac/dwmac-ingenic.c | 401 +++++++++++++++++++++
5 files changed, 505 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/ingenic,mac.yaml
create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. 2021-06-14 17:15 [PATCH v3 0/2] Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) @ 2021-06-14 17:15 ` 周琰杰 (Zhou Yanjie) 2021-06-14 17:36 ` Andrew Lunn ` (2 more replies) 2021-06-14 17:15 ` [PATCH v3 2/2] net: stmmac: Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) 2021-06-14 20:20 ` [PATCH v3 0/2] " patchwork-bot+netdevbpf 2 siblings, 3 replies; 12+ messages in thread From: 周琰杰 (Zhou Yanjie) @ 2021-06-14 17:15 UTC (permalink / raw) To: davem, kuba, robh+dt, peppe.cavallaro, alexandre.torgue, joabreu, mcoquelin.stm32, matthias.bgg Cc: alexandre.torgue, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, linux-mediatek, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou Add the dwmac bindings for the JZ4775 SoC, the X1000 SoC, the X1600 SoC, the X1830 SoC and the X2000 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> --- Notes: v1->v2: No change. v2->v3: Add "ingenic,mac.yaml" for Ingenic SoCs. .../devicetree/bindings/net/ingenic,mac.yaml | 76 ++++++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml | 15 +++++ 2 files changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/ingenic,mac.yaml diff --git a/Documentation/devicetree/bindings/net/ingenic,mac.yaml b/Documentation/devicetree/bindings/net/ingenic,mac.yaml new file mode 100644 index 00000000..5fe2e81 --- /dev/null +++ b/Documentation/devicetree/bindings/net/ingenic,mac.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ingenic,mac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for MAC in Ingenic SoCs + +maintainers: + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> + +description: + The Ethernet Media Access Controller in Ingenic SoCs. + +properties: + compatible: + enum: + - ingenic,jz4775-mac + - ingenic,x1000-mac + - ingenic,x1600-mac + - ingenic,x1830-mac + - ingenic,x2000-mac + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-names: + const: macirq + + clocks: + maxItems: 1 + + clock-names: + const: stmmaceth + + mode-reg: + description: An extra syscon register that control ethernet interface and timing delay + + rx-clk-delay-ps: + description: RGMII receive clock delay defined in pico seconds + + tx-clk-delay-ps: + description: RGMII transmit clock delay defined in pico seconds + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - mode-reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/x1000-cgu.h> + + mac: ethernet@134b0000 { + compatible = "ingenic,x1000-mac", "snps,dwmac"; + reg = <0x134b0000 0x2000>; + + interrupt-parent = <&intc>; + interrupts = <55>; + interrupt-names = "macirq"; + + clocks = <&cgu X1000_CLK_MAC>; + clock-names = "stmmaceth"; + + mode-reg = <&mac_phy_ctrl>; + }; +... diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 2edd8be..9c0ce92 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -56,6 +56,11 @@ properties: - amlogic,meson8m2-dwmac - amlogic,meson-gxbb-dwmac - amlogic,meson-axg-dwmac + - ingenic,jz4775-mac + - ingenic,x1000-mac + - ingenic,x1600-mac + - ingenic,x1830-mac + - ingenic,x2000-mac - rockchip,px30-gmac - rockchip,rk3128-gmac - rockchip,rk3228-gmac @@ -310,6 +315,11 @@ allOf: - allwinner,sun8i-r40-emac - allwinner,sun8i-v3s-emac - allwinner,sun50i-a64-emac + - ingenic,jz4775-mac + - ingenic,x1000-mac + - ingenic,x1600-mac + - ingenic,x1830-mac + - ingenic,x2000-mac - snps,dwxgmac - snps,dwxgmac-2.10 - st,spear600-gmac @@ -353,6 +363,11 @@ allOf: - allwinner,sun8i-r40-emac - allwinner,sun8i-v3s-emac - allwinner,sun50i-a64-emac + - ingenic,jz4775-mac + - ingenic,x1000-mac + - ingenic,x1600-mac + - ingenic,x1830-mac + - ingenic,x2000-mac - snps,dwmac-4.00 - snps,dwmac-4.10a - snps,dwmac-4.20a -- 2.7.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. 2021-06-14 17:15 ` [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie) @ 2021-06-14 17:36 ` Andrew Lunn 2021-06-15 14:04 ` Rob Herring 2021-06-15 23:05 ` Rob Herring 2 siblings, 0 replies; 12+ messages in thread From: Andrew Lunn @ 2021-06-14 17:36 UTC (permalink / raw) To: 周琰杰 (Zhou Yanjie) Cc: davem, kuba, robh+dt, peppe.cavallaro, alexandre.torgue, joabreu, mcoquelin.stm32, matthias.bgg, alexandre.torgue, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, linux-mediatek, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou On Tue, Jun 15, 2021 at 01:15:36AM +0800, 周琰杰 (Zhou Yanjie) wrote: > Add the dwmac bindings for the JZ4775 SoC, the X1000 SoC, > the X1600 SoC, the X1830 SoC and the X2000 SoC from Ingenic. > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. 2021-06-14 17:15 ` [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie) 2021-06-14 17:36 ` Andrew Lunn @ 2021-06-15 14:04 ` Rob Herring 2021-06-15 23:05 ` Rob Herring 2 siblings, 0 replies; 12+ messages in thread From: Rob Herring @ 2021-06-15 14:04 UTC (permalink / raw) To: 周琰杰 (Zhou Yanjie) Cc: linux-mediatek, dongsheng.qiu, netdev, peppe.cavallaro, devicetree, joabreu, kuba, davem, sihui.liu, alexandre.torgue, mcoquelin.stm32, aric.pzqi, linux-kernel, matthias.bgg, linux-stm32, jun.jiang, robh+dt, linux-arm-kernel, rick.tyliu, sernia.zhou, alexandre.torgue [-- Warning: decoded text below may be mangled, UTF-8 assumed --] [-- Attachment #1: Type: text/plain, Size: 2082 bytes --] On Tue, 15 Jun 2021 01:15:36 +0800, 周琰杰 (Zhou Yanjie) wrote: > Add the dwmac bindings for the JZ4775 SoC, the X1000 SoC, > the X1600 SoC, the X1830 SoC and the X2000 SoC from Ingenic. > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > --- > > Notes: > v1->v2: > No change. > > v2->v3: > Add "ingenic,mac.yaml" for Ingenic SoCs. > > .../devicetree/bindings/net/ingenic,mac.yaml | 76 ++++++++++++++++++++++ > .../devicetree/bindings/net/snps,dwmac.yaml | 15 +++++ > 2 files changed, 91 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/ingenic,mac.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/ingenic,mac.example.dt.yaml: ethernet@134b0000: compatible: ['ingenic,x1000-mac', 'snps,dwmac'] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/ingenic,mac.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/ingenic,mac.example.dt.yaml: ethernet@134b0000: compatible: Additional items are not allowed ('snps,dwmac' was unexpected) From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/ingenic,mac.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/ingenic,mac.example.dt.yaml: ethernet@134b0000: 'phy-mode' is a required property From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/snps,dwmac.yaml \ndoc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1491797 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. 2021-06-14 17:15 ` [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie) 2021-06-14 17:36 ` Andrew Lunn 2021-06-15 14:04 ` Rob Herring @ 2021-06-15 23:05 ` Rob Herring 2021-06-16 7:45 ` 周琰杰 2 siblings, 1 reply; 12+ messages in thread From: Rob Herring @ 2021-06-15 23:05 UTC (permalink / raw) To: 周琰杰 (Zhou Yanjie) Cc: David Miller, Jakub Kicinski, Giuseppe CAVALLARO, Alexandre Torgue, Jose Abreu, Maxime Coquelin, Matthias Brugger, Alexandre Torgue, netdev, devicetree, linux-kernel, moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel, moderated list:ARM/Mediatek SoC support, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou On Mon, Jun 14, 2021 at 11:18 AM 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> wrote: > > Add the dwmac bindings for the JZ4775 SoC, the X1000 SoC, > the X1600 SoC, the X1830 SoC and the X2000 SoC from Ingenic. > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > --- > > Notes: > v1->v2: > No change. > > v2->v3: > Add "ingenic,mac.yaml" for Ingenic SoCs. > > .../devicetree/bindings/net/ingenic,mac.yaml | 76 ++++++++++++++++++++++ > .../devicetree/bindings/net/snps,dwmac.yaml | 15 +++++ > 2 files changed, 91 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/ingenic,mac.yaml > > diff --git a/Documentation/devicetree/bindings/net/ingenic,mac.yaml b/Documentation/devicetree/bindings/net/ingenic,mac.yaml > new file mode 100644 > index 00000000..5fe2e81 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/ingenic,mac.yaml > @@ -0,0 +1,76 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/ingenic,mac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Bindings for MAC in Ingenic SoCs > + > +maintainers: > + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > + > +description: > + The Ethernet Media Access Controller in Ingenic SoCs. > + > +properties: > + compatible: > + enum: > + - ingenic,jz4775-mac > + - ingenic,x1000-mac > + - ingenic,x1600-mac > + - ingenic,x1830-mac > + - ingenic,x2000-mac > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + interrupt-names: > + const: macirq > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: stmmaceth > + > + mode-reg: > + description: An extra syscon register that control ethernet interface and timing delay Needs a vendor prefix and type. > + > + rx-clk-delay-ps: > + description: RGMII receive clock delay defined in pico seconds > + > + tx-clk-delay-ps: > + description: RGMII transmit clock delay defined in pico seconds > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupt-names > + - clocks > + - clock-names > + - mode-reg > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/x1000-cgu.h> > + > + mac: ethernet@134b0000 { > + compatible = "ingenic,x1000-mac", "snps,dwmac"; Doesn't match the schema. > + reg = <0x134b0000 0x2000>; > + > + interrupt-parent = <&intc>; > + interrupts = <55>; > + interrupt-names = "macirq"; > + > + clocks = <&cgu X1000_CLK_MAC>; > + clock-names = "stmmaceth"; > + > + mode-reg = <&mac_phy_ctrl>; > + }; > +... > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > index 2edd8be..9c0ce92 100644 > --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml > +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml > @@ -56,6 +56,11 @@ properties: > - amlogic,meson8m2-dwmac > - amlogic,meson-gxbb-dwmac > - amlogic,meson-axg-dwmac > + - ingenic,jz4775-mac > + - ingenic,x1000-mac > + - ingenic,x1600-mac > + - ingenic,x1830-mac > + - ingenic,x2000-mac > - rockchip,px30-gmac > - rockchip,rk3128-gmac > - rockchip,rk3228-gmac > @@ -310,6 +315,11 @@ allOf: > - allwinner,sun8i-r40-emac > - allwinner,sun8i-v3s-emac > - allwinner,sun50i-a64-emac > + - ingenic,jz4775-mac > + - ingenic,x1000-mac > + - ingenic,x1600-mac > + - ingenic,x1830-mac > + - ingenic,x2000-mac > - snps,dwxgmac > - snps,dwxgmac-2.10 > - st,spear600-gmac > @@ -353,6 +363,11 @@ allOf: > - allwinner,sun8i-r40-emac > - allwinner,sun8i-v3s-emac > - allwinner,sun50i-a64-emac > + - ingenic,jz4775-mac > + - ingenic,x1000-mac > + - ingenic,x1600-mac > + - ingenic,x1830-mac > + - ingenic,x2000-mac > - snps,dwmac-4.00 > - snps,dwmac-4.10a > - snps,dwmac-4.20a > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. 2021-06-15 23:05 ` Rob Herring @ 2021-06-16 7:45 ` 周琰杰 2021-06-17 3:24 ` 周琰杰 0 siblings, 1 reply; 12+ messages in thread From: 周琰杰 @ 2021-06-16 7:45 UTC (permalink / raw) To: Rob Herring Cc: David Miller, Jakub Kicinski, Giuseppe CAVALLARO, Alexandre Torgue, Jose Abreu, Maxime Coquelin, Matthias Brugger, Alexandre Torgue, netdev, devicetree, linux-kernel, moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel, moderated list:ARM/Mediatek SoC support, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou Hi Rob, 于 Tue, 15 Jun 2021 17:05:45 -0600 Rob Herring <robh+dt@kernel.org> 写道: > On Mon, Jun 14, 2021 at 11:18 AM 周琰杰 (Zhou Yanjie) > <zhouyanjie@wanyeetech.com> wrote: > > > > Add the dwmac bindings for the JZ4775 SoC, the X1000 SoC, > > the X1600 SoC, the X1830 SoC and the X2000 SoC from Ingenic. > > > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > --- > > > > Notes: > > v1->v2: > > No change. > > > > v2->v3: > > Add "ingenic,mac.yaml" for Ingenic SoCs. > > > > .../devicetree/bindings/net/ingenic,mac.yaml | 76 > > ++++++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml > > | 15 +++++ 2 files changed, 91 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/net/ingenic,mac.yaml > > > > diff --git a/Documentation/devicetree/bindings/net/ingenic,mac.yaml > > b/Documentation/devicetree/bindings/net/ingenic,mac.yaml new file > > mode 100644 index 00000000..5fe2e81 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/ingenic,mac.yaml > > @@ -0,0 +1,76 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/ingenic,mac.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Bindings for MAC in Ingenic SoCs > > + > > +maintainers: > > + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > + > > +description: > > + The Ethernet Media Access Controller in Ingenic SoCs. > > + > > +properties: > > + compatible: > > + enum: > > + - ingenic,jz4775-mac > > + - ingenic,x1000-mac > > + - ingenic,x1600-mac > > + - ingenic,x1830-mac > > + - ingenic,x2000-mac > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + interrupt-names: > > + const: macirq > > + > > + clocks: > > + maxItems: 1 > > + > > + clock-names: > > + const: stmmaceth > > + > > + mode-reg: > > + description: An extra syscon register that control ethernet > > interface and timing delay > > Needs a vendor prefix and type. > > > + > > + rx-clk-delay-ps: > > + description: RGMII receive clock delay defined in pico seconds > > + > > + tx-clk-delay-ps: > > + description: RGMII transmit clock delay defined in pico seconds > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - interrupt-names > > + - clocks > > + - clock-names > > + - mode-reg > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/x1000-cgu.h> > > + > > + mac: ethernet@134b0000 { > > + compatible = "ingenic,x1000-mac", "snps,dwmac"; > > Doesn't match the schema. Sorry for that, somehow when I run "make dt_bindings_check", there is no warrning or error message about this file. I am sure that yamllint is installed and dtschema has been upgraded to 2021.6. I will send a fix. Thanks and best regards! > > > + reg = <0x134b0000 0x2000>; > > + > > + interrupt-parent = <&intc>; > > + interrupts = <55>; > > + interrupt-names = "macirq"; > > + > > + clocks = <&cgu X1000_CLK_MAC>; > > + clock-names = "stmmaceth"; > > + > > + mode-reg = <&mac_phy_ctrl>; > > + }; > > +... > > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index > > 2edd8be..9c0ce92 100644 --- > > a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ > > b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -56,6 > > +56,11 @@ properties: > > - amlogic,meson8m2-dwmac > > - amlogic,meson-gxbb-dwmac > > - amlogic,meson-axg-dwmac > > + - ingenic,jz4775-mac > > + - ingenic,x1000-mac > > + - ingenic,x1600-mac > > + - ingenic,x1830-mac > > + - ingenic,x2000-mac > > - rockchip,px30-gmac > > - rockchip,rk3128-gmac > > - rockchip,rk3228-gmac > > @@ -310,6 +315,11 @@ allOf: > > - allwinner,sun8i-r40-emac > > - allwinner,sun8i-v3s-emac > > - allwinner,sun50i-a64-emac > > + - ingenic,jz4775-mac > > + - ingenic,x1000-mac > > + - ingenic,x1600-mac > > + - ingenic,x1830-mac > > + - ingenic,x2000-mac > > - snps,dwxgmac > > - snps,dwxgmac-2.10 > > - st,spear600-gmac > > @@ -353,6 +363,11 @@ allOf: > > - allwinner,sun8i-r40-emac > > - allwinner,sun8i-v3s-emac > > - allwinner,sun50i-a64-emac > > + - ingenic,jz4775-mac > > + - ingenic,x1000-mac > > + - ingenic,x1600-mac > > + - ingenic,x1830-mac > > + - ingenic,x2000-mac > > - snps,dwmac-4.00 > > - snps,dwmac-4.10a > > - snps,dwmac-4.20a > > -- > > 2.7.4 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. 2021-06-16 7:45 ` 周琰杰 @ 2021-06-17 3:24 ` 周琰杰 2021-06-18 19:50 ` Rob Herring 0 siblings, 1 reply; 12+ messages in thread From: 周琰杰 @ 2021-06-17 3:24 UTC (permalink / raw) To: Rob Herring, sihui.liu Cc: David Miller, Jakub Kicinski, Giuseppe CAVALLARO, Alexandre Torgue, Jose Abreu, Maxime Coquelin, Matthias Brugger, Alexandre Torgue, netdev, devicetree, linux-kernel, moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel, moderated list:ARM/Mediatek SoC support, dongsheng.qiu, aric.pzqi, rick.tyliu, jun.jiang, sernia.zhou Hi Rob, 于 Wed, 16 Jun 2021 15:45:26 +0800 周琰杰 <zhouyanjie@wanyeetech.com> 写道: > Hi Rob, > > 于 Tue, 15 Jun 2021 17:05:45 -0600 > Rob Herring <robh+dt@kernel.org> 写道: > > > On Mon, Jun 14, 2021 at 11:18 AM 周琰杰 (Zhou Yanjie) > > <zhouyanjie@wanyeetech.com> wrote: > > > > > > Add the dwmac bindings for the JZ4775 SoC, the X1000 SoC, > > > the X1600 SoC, the X1830 SoC and the X2000 SoC from Ingenic. > > > > > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > > --- > > > > > > Notes: > > > v1->v2: > > > No change. > > > > > > v2->v3: > > > Add "ingenic,mac.yaml" for Ingenic SoCs. > > > > > > .../devicetree/bindings/net/ingenic,mac.yaml | 76 > > > ++++++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml > > > | 15 +++++ 2 files changed, 91 insertions(+) > > > create mode 100644 > > > Documentation/devicetree/bindings/net/ingenic,mac.yaml > > > > > > diff --git > > > a/Documentation/devicetree/bindings/net/ingenic,mac.yaml > > > b/Documentation/devicetree/bindings/net/ingenic,mac.yaml new file > > > mode 100644 index 00000000..5fe2e81 --- /dev/null > > > +++ b/Documentation/devicetree/bindings/net/ingenic,mac.yaml > > > @@ -0,0 +1,76 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/net/ingenic,mac.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Bindings for MAC in Ingenic SoCs > > > + > > > +maintainers: > > > + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > > + > > > +description: > > > + The Ethernet Media Access Controller in Ingenic SoCs. > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - ingenic,jz4775-mac > > > + - ingenic,x1000-mac > > > + - ingenic,x1600-mac > > > + - ingenic,x1830-mac > > > + - ingenic,x2000-mac > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + interrupts: > > > + maxItems: 1 > > > + > > > + interrupt-names: > > > + const: macirq > > > + > > > + clocks: > > > + maxItems: 1 > > > + > > > + clock-names: > > > + const: stmmaceth > > > + > > > + mode-reg: > > > + description: An extra syscon register that control ethernet > > > interface and timing delay > > > > Needs a vendor prefix and type. > > > > > + > > > + rx-clk-delay-ps: > > > + description: RGMII receive clock delay defined in pico > > > seconds + > > > + tx-clk-delay-ps: > > > + description: RGMII transmit clock delay defined in pico > > > seconds + > > > +required: > > > + - compatible > > > + - reg > > > + - interrupts > > > + - interrupt-names > > > + - clocks > > > + - clock-names > > > + - mode-reg > > > + > > > +additionalProperties: false > > > + > > > +examples: > > > + - | > > > + #include <dt-bindings/clock/x1000-cgu.h> > > > + > > > + mac: ethernet@134b0000 { > > > + compatible = "ingenic,x1000-mac", "snps,dwmac"; > > > > Doesn't match the schema. > > Sorry for that, somehow when I run "make dt_bindings_check", there is > no warrning or error message about this file. I am sure that yamllint > is installed and dtschema has been upgraded to 2021.6. I found that it seems to be because 5.13 newly introduced "DT_CHECKER_FLAGS=-m", and I am still using the old "make dt_binding_check" command, so this error is not prompted. Now I can see this error message after using the "make DT_CHECKER_FLAGS=-m dt_binding_check" command, and I will send a fix soon. Thanks and best regards! > > I will send a fix. > > Thanks and best regards! > > > > > > + reg = <0x134b0000 0x2000>; > > > + > > > + interrupt-parent = <&intc>; > > > + interrupts = <55>; > > > + interrupt-names = "macirq"; > > > + > > > + clocks = <&cgu X1000_CLK_MAC>; > > > + clock-names = "stmmaceth"; > > > + > > > + mode-reg = <&mac_phy_ctrl>; > > > + }; > > > +... > > > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml > > > b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index > > > 2edd8be..9c0ce92 100644 --- > > > a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ > > > b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -56,6 > > > +56,11 @@ properties: > > > - amlogic,meson8m2-dwmac > > > - amlogic,meson-gxbb-dwmac > > > - amlogic,meson-axg-dwmac > > > + - ingenic,jz4775-mac > > > + - ingenic,x1000-mac > > > + - ingenic,x1600-mac > > > + - ingenic,x1830-mac > > > + - ingenic,x2000-mac > > > - rockchip,px30-gmac > > > - rockchip,rk3128-gmac > > > - rockchip,rk3228-gmac > > > @@ -310,6 +315,11 @@ allOf: > > > - allwinner,sun8i-r40-emac > > > - allwinner,sun8i-v3s-emac > > > - allwinner,sun50i-a64-emac > > > + - ingenic,jz4775-mac > > > + - ingenic,x1000-mac > > > + - ingenic,x1600-mac > > > + - ingenic,x1830-mac > > > + - ingenic,x2000-mac > > > - snps,dwxgmac > > > - snps,dwxgmac-2.10 > > > - st,spear600-gmac > > > @@ -353,6 +363,11 @@ allOf: > > > - allwinner,sun8i-r40-emac > > > - allwinner,sun8i-v3s-emac > > > - allwinner,sun50i-a64-emac > > > + - ingenic,jz4775-mac > > > + - ingenic,x1000-mac > > > + - ingenic,x1600-mac > > > + - ingenic,x1830-mac > > > + - ingenic,x2000-mac > > > - snps,dwmac-4.00 > > > - snps,dwmac-4.10a > > > - snps,dwmac-4.20a > > > -- > > > 2.7.4 > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. 2021-06-17 3:24 ` 周琰杰 @ 2021-06-18 19:50 ` Rob Herring 0 siblings, 0 replies; 12+ messages in thread From: Rob Herring @ 2021-06-18 19:50 UTC (permalink / raw) To: 周琰杰 Cc: sihui.liu, David Miller, Jakub Kicinski, Giuseppe CAVALLARO, Alexandre Torgue, Jose Abreu, Maxime Coquelin, Matthias Brugger, Alexandre Torgue, netdev, devicetree, linux-kernel, moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel, moderated list:ARM/Mediatek SoC support, dongsheng.qiu, aric.pzqi, rick.tyliu, jun.jiang, sernia.zhou On Wed, Jun 16, 2021 at 9:24 PM 周琰杰 <zhouyanjie@wanyeetech.com> wrote: > > Hi Rob, > > 于 Wed, 16 Jun 2021 15:45:26 +0800 > 周琰杰 <zhouyanjie@wanyeetech.com> 写道: > > > Hi Rob, > > > > 于 Tue, 15 Jun 2021 17:05:45 -0600 > > Rob Herring <robh+dt@kernel.org> 写道: > > > > > On Mon, Jun 14, 2021 at 11:18 AM 周琰杰 (Zhou Yanjie) > > > <zhouyanjie@wanyeetech.com> wrote: > > > > > > > > Add the dwmac bindings for the JZ4775 SoC, the X1000 SoC, > > > > the X1600 SoC, the X1830 SoC and the X2000 SoC from Ingenic. > > > > > > > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > > > --- > > > > > > > > Notes: > > > > v1->v2: > > > > No change. > > > > > > > > v2->v3: > > > > Add "ingenic,mac.yaml" for Ingenic SoCs. > > > > > > > > .../devicetree/bindings/net/ingenic,mac.yaml | 76 > > > > ++++++++++++++++++++++ .../devicetree/bindings/net/snps,dwmac.yaml > > > > | 15 +++++ 2 files changed, 91 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/net/ingenic,mac.yaml > > > > > > > > diff --git > > > > a/Documentation/devicetree/bindings/net/ingenic,mac.yaml > > > > b/Documentation/devicetree/bindings/net/ingenic,mac.yaml new file > > > > mode 100644 index 00000000..5fe2e81 --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/net/ingenic,mac.yaml > > > > @@ -0,0 +1,76 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > > +%YAML 1.2 > > > > +--- > > > > +$id: http://devicetree.org/schemas/net/ingenic,mac.yaml# > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > + > > > > +title: Bindings for MAC in Ingenic SoCs > > > > + > > > > +maintainers: > > > > + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> > > > > + > > > > +description: > > > > + The Ethernet Media Access Controller in Ingenic SoCs. > > > > + > > > > +properties: > > > > + compatible: > > > > + enum: > > > > + - ingenic,jz4775-mac > > > > + - ingenic,x1000-mac > > > > + - ingenic,x1600-mac > > > > + - ingenic,x1830-mac > > > > + - ingenic,x2000-mac > > > > + > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > + interrupts: > > > > + maxItems: 1 > > > > + > > > > + interrupt-names: > > > > + const: macirq > > > > + > > > > + clocks: > > > > + maxItems: 1 > > > > + > > > > + clock-names: > > > > + const: stmmaceth > > > > + > > > > + mode-reg: > > > > + description: An extra syscon register that control ethernet > > > > interface and timing delay > > > > > > Needs a vendor prefix and type. > > > > > > > + > > > > + rx-clk-delay-ps: > > > > + description: RGMII receive clock delay defined in pico > > > > seconds + > > > > + tx-clk-delay-ps: > > > > + description: RGMII transmit clock delay defined in pico > > > > seconds + > > > > +required: > > > > + - compatible > > > > + - reg > > > > + - interrupts > > > > + - interrupt-names > > > > + - clocks > > > > + - clock-names > > > > + - mode-reg > > > > + > > > > +additionalProperties: false > > > > + > > > > +examples: > > > > + - | > > > > + #include <dt-bindings/clock/x1000-cgu.h> > > > > + > > > > + mac: ethernet@134b0000 { > > > > + compatible = "ingenic,x1000-mac", "snps,dwmac"; > > > > > > Doesn't match the schema. > > > > Sorry for that, somehow when I run "make dt_bindings_check", there is > > no warrning or error message about this file. I am sure that yamllint > > is installed and dtschema has been upgraded to 2021.6. > > I found that it seems to be because 5.13 newly introduced > "DT_CHECKER_FLAGS=-m", and I am still using the old > "make dt_binding_check" command, so this error is not prompted. Now I > can see this error message after using the > "make DT_CHECKER_FLAGS=-m dt_binding_check" command, and I will send a > fix soon. No, this error has nothing to do with the '-m' option. Rob ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 2/2] net: stmmac: Add Ingenic SoCs MAC support. 2021-06-14 17:15 [PATCH v3 0/2] Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) 2021-06-14 17:15 ` [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie) @ 2021-06-14 17:15 ` 周琰杰 (Zhou Yanjie) 2021-06-14 17:36 ` Andrew Lunn 2021-06-14 20:20 ` [PATCH v3 0/2] " patchwork-bot+netdevbpf 2 siblings, 1 reply; 12+ messages in thread From: 周琰杰 (Zhou Yanjie) @ 2021-06-14 17:15 UTC (permalink / raw) To: davem, kuba, robh+dt, peppe.cavallaro, alexandre.torgue, joabreu, mcoquelin.stm32, matthias.bgg Cc: alexandre.torgue, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, linux-mediatek, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou Add support for Ingenic SoC MAC glue layer support for the stmmac device driver. This driver is used on for the MAC ethernet controller found in the JZ4775 SoC, the X1000 SoC, the X1600 SoC, the X1830 SoC, and the X2000 SoC. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> --- Notes: v1->v2: 1.Fix uninitialized variable. 2.Add missing RGMII-ID, RGMII-RXID, and RGMII-TXID. 3.Change variable val from int to unsinged int. 4.Get tx clock delay and rx clock delay from devicetree. v2->v3: 1.Change tx clk delay and rx clk delay from hardware value to ps. 2.return -EINVAL when a unsupported value is encountered when parsing the binding. 3.Simplify the code of the RGMII part of X2000 SoC according to Andrew Lunn’s suggestion. 4.Follow the example of "dwmac-mediatek.c" to improve the code that handles delays according to Andrew Lunn’s suggestion. drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../net/ethernet/stmicro/stmmac/dwmac-ingenic.c | 401 +++++++++++++++++++++ 3 files changed, 414 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 7737e4d0..9a19e4d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -66,6 +66,18 @@ config DWMAC_ANARION This selects the Anarion SoC glue layer support for the stmmac driver. +config DWMAC_INGENIC + tristate "Ingenic MAC support" + default MACH_INGENIC + depends on OF && HAS_IOMEM && (MACH_INGENIC || COMPILE_TEST) + select MFD_SYSCON + help + Support for ethernet controller on Ingenic SoCs. + + This selects Ingenic SoCs glue layer support for the stmmac + device driver. This driver is used on for the Ingenic SoCs + MAC ethernet controller. + config DWMAC_IPQ806X tristate "QCA IPQ806x DWMAC support" default ARCH_QCOM diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index f2e478b..6471f93 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -14,6 +14,7 @@ stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o # Ordering matters. Generic driver must be last. obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o obj-$(CONFIG_DWMAC_ANARION) += dwmac-anarion.o +obj-$(CONFIG_DWMAC_INGENIC) += dwmac-ingenic.o obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o obj-$(CONFIG_DWMAC_MEDIATEK) += dwmac-mediatek.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c new file mode 100644 index 00000000..e757db5 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c @@ -0,0 +1,401 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dwmac-ingenic.c - Ingenic SoCs DWMAC specific glue layer + * + * Copyright (c) 2021 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> + */ + +#include <linux/bitfield.h> +#include <linux/clk.h> +#include <linux/kernel.h> +#include <linux/mfd/syscon.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/of_net.h> +#include <linux/phy.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <linux/stmmac.h> + +#include "stmmac_platform.h" + +#define MACPHYC_TXCLK_SEL_MASK GENMASK(31, 31) +#define MACPHYC_TXCLK_SEL_OUTPUT 0x1 +#define MACPHYC_TXCLK_SEL_INPUT 0x0 +#define MACPHYC_MODE_SEL_MASK GENMASK(31, 31) +#define MACPHYC_MODE_SEL_RMII 0x0 +#define MACPHYC_TX_SEL_MASK GENMASK(19, 19) +#define MACPHYC_TX_SEL_ORIGIN 0x0 +#define MACPHYC_TX_SEL_DELAY 0x1 +#define MACPHYC_TX_DELAY_MASK GENMASK(18, 12) +#define MACPHYC_RX_SEL_MASK GENMASK(11, 11) +#define MACPHYC_RX_SEL_ORIGIN 0x0 +#define MACPHYC_RX_SEL_DELAY 0x1 +#define MACPHYC_RX_DELAY_MASK GENMASK(10, 4) +#define MACPHYC_SOFT_RST_MASK GENMASK(3, 3) +#define MACPHYC_PHY_INFT_MASK GENMASK(2, 0) +#define MACPHYC_PHY_INFT_RMII 0x4 +#define MACPHYC_PHY_INFT_RGMII 0x1 +#define MACPHYC_PHY_INFT_GMII 0x0 +#define MACPHYC_PHY_INFT_MII 0x0 + +#define MACPHYC_TX_DELAY_PS_MAX 2496 +#define MACPHYC_TX_DELAY_PS_MIN 20 + +#define MACPHYC_RX_DELAY_PS_MAX 2496 +#define MACPHYC_RX_DELAY_PS_MIN 20 + +enum ingenic_mac_version { + ID_JZ4775, + ID_X1000, + ID_X1600, + ID_X1830, + ID_X2000, +}; + +struct ingenic_mac { + const struct ingenic_soc_info *soc_info; + struct device *dev; + struct regmap *regmap; + + int rx_delay; + int tx_delay; +}; + +struct ingenic_soc_info { + enum ingenic_mac_version version; + u32 mask; + + int (*set_mode)(struct plat_stmmacenet_data *plat_dat); +}; + +static int ingenic_mac_init(struct plat_stmmacenet_data *plat_dat) +{ + struct ingenic_mac *mac = plat_dat->bsp_priv; + int ret; + + if (mac->soc_info->set_mode) { + ret = mac->soc_info->set_mode(plat_dat); + if (ret) + return ret; + } + + return 0; +} + +static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +{ + struct ingenic_mac *mac = plat_dat->bsp_priv; + unsigned int val; + + switch (plat_dat->interface) { + case PHY_INTERFACE_MODE_MII: + val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | + FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII); + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n"); + break; + + case PHY_INTERFACE_MODE_GMII: + val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | + FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_GMII); + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n"); + break; + + case PHY_INTERFACE_MODE_RMII: + val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | + FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); + break; + + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | + FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII); + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); + break; + + default: + dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); + return -EINVAL; + } + + /* Update MAC PHY control register */ + return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); +} + +static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +{ + struct ingenic_mac *mac = plat_dat->bsp_priv; + + switch (plat_dat->interface) { + case PHY_INTERFACE_MODE_RMII: + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); + break; + + default: + dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); + return -EINVAL; + } + + /* Update MAC PHY control register */ + return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, 0); +} + +static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +{ + struct ingenic_mac *mac = plat_dat->bsp_priv; + unsigned int val; + + switch (plat_dat->interface) { + case PHY_INTERFACE_MODE_RMII: + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); + break; + + default: + dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); + return -EINVAL; + } + + /* Update MAC PHY control register */ + return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); +} + +static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +{ + struct ingenic_mac *mac = plat_dat->bsp_priv; + unsigned int val; + + switch (plat_dat->interface) { + case PHY_INTERFACE_MODE_RMII: + val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) | + FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); + break; + + default: + dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); + return -EINVAL; + } + + /* Update MAC PHY control register */ + return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); +} + +static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) +{ + struct ingenic_mac *mac = plat_dat->bsp_priv; + unsigned int val; + + switch (plat_dat->interface) { + case PHY_INTERFACE_MODE_RMII: + val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | + FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN) | + FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); + break; + + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII); + + if (mac->tx_delay == 0) + val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN); + else + val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_DELAY) | + FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac->tx_delay + 9750) / 19500 - 1); + + if (mac->rx_delay == 0) + val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN); + else + val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_DELAY) | + FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1); + + dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n"); + break; + + default: + dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); + return -EINVAL; + } + + /* Update MAC PHY control register */ + return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val); +} + +static int ingenic_mac_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + struct ingenic_mac *mac; + const struct ingenic_soc_info *data; + u32 tx_delay_ps, rx_delay_ps; + int ret; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return ret; + + plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) + return PTR_ERR(plat_dat); + + mac = devm_kzalloc(&pdev->dev, sizeof(*mac), GFP_KERNEL); + if (!mac) { + ret = -ENOMEM; + goto err_remove_config_dt; + } + + data = of_device_get_match_data(&pdev->dev); + if (!data) { + dev_err(&pdev->dev, "No of match data provided\n"); + ret = -EINVAL; + goto err_remove_config_dt; + } + + /* Get MAC PHY control register */ + mac->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "mode-reg"); + if (IS_ERR(mac->regmap)) { + dev_err(&pdev->dev, "%s: Failed to get syscon regmap\n", __func__); + goto err_remove_config_dt; + } + + if (!of_property_read_u32(pdev->dev.of_node, "tx-clk-delay-ps", &tx_delay_ps)) { + if (tx_delay_ps >= MACPHYC_TX_DELAY_PS_MIN && + tx_delay_ps <= MACPHYC_TX_DELAY_PS_MAX) { + mac->tx_delay = tx_delay_ps * 1000; + } else { + dev_err(&pdev->dev, "Invalid TX clock delay: %dps\n", tx_delay_ps); + return -EINVAL; + } + } + + if (!of_property_read_u32(pdev->dev.of_node, "rx-clk-delay-ps", &rx_delay_ps)) { + if (rx_delay_ps >= MACPHYC_RX_DELAY_PS_MIN && + rx_delay_ps <= MACPHYC_RX_DELAY_PS_MAX) { + mac->rx_delay = rx_delay_ps * 1000; + } else { + dev_err(&pdev->dev, "Invalid RX clock delay: %dps\n", rx_delay_ps); + return -EINVAL; + } + } + + mac->soc_info = data; + mac->dev = &pdev->dev; + + plat_dat->bsp_priv = mac; + + ret = ingenic_mac_init(plat_dat); + if (ret) + goto err_remove_config_dt; + + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (ret) + goto err_remove_config_dt; + + return 0; + +err_remove_config_dt: + stmmac_remove_config_dt(pdev, plat_dat); + + return ret; +} + +#ifdef CONFIG_PM_SLEEP +static int ingenic_mac_suspend(struct device *dev) +{ + struct net_device *ndev = dev_get_drvdata(dev); + struct stmmac_priv *priv = netdev_priv(ndev); + struct ingenic_mac *mac = priv->plat->bsp_priv; + int ret; + + ret = stmmac_suspend(dev); + + return ret; +} + +static int ingenic_mac_resume(struct device *dev) +{ + struct net_device *ndev = dev_get_drvdata(dev); + struct stmmac_priv *priv = netdev_priv(ndev); + struct ingenic_mac *mac = priv->plat->bsp_priv; + int ret; + + ret = ingenic_mac_init(priv->plat); + if (ret) + return ret; + + ret = stmmac_resume(dev); + + return ret; +} +#endif /* CONFIG_PM_SLEEP */ + +static SIMPLE_DEV_PM_OPS(ingenic_mac_pm_ops, ingenic_mac_suspend, ingenic_mac_resume); + +static struct ingenic_soc_info jz4775_soc_info = { + .version = ID_JZ4775, + .mask = MACPHYC_TXCLK_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, + + .set_mode = jz4775_mac_set_mode, +}; + +static struct ingenic_soc_info x1000_soc_info = { + .version = ID_X1000, + .mask = MACPHYC_SOFT_RST_MASK, + + .set_mode = x1000_mac_set_mode, +}; + +static struct ingenic_soc_info x1600_soc_info = { + .version = ID_X1600, + .mask = MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, + + .set_mode = x1600_mac_set_mode, +}; + +static struct ingenic_soc_info x1830_soc_info = { + .version = ID_X1830, + .mask = MACPHYC_MODE_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, + + .set_mode = x1830_mac_set_mode, +}; + +static struct ingenic_soc_info x2000_soc_info = { + .version = ID_X2000, + .mask = MACPHYC_TX_SEL_MASK | MACPHYC_TX_DELAY_MASK | MACPHYC_RX_SEL_MASK | + MACPHYC_RX_DELAY_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK, + + .set_mode = x2000_mac_set_mode, +}; + +static const struct of_device_id ingenic_mac_of_matches[] = { + { .compatible = "ingenic,jz4775-mac", .data = &jz4775_soc_info }, + { .compatible = "ingenic,x1000-mac", .data = &x1000_soc_info }, + { .compatible = "ingenic,x1600-mac", .data = &x1600_soc_info }, + { .compatible = "ingenic,x1830-mac", .data = &x1830_soc_info }, + { .compatible = "ingenic,x2000-mac", .data = &x2000_soc_info }, + { } +}; +MODULE_DEVICE_TABLE(of, ingenic_mac_of_matches); + +static struct platform_driver ingenic_mac_driver = { + .probe = ingenic_mac_probe, + .remove = stmmac_pltfr_remove, + .driver = { + .name = "ingenic-mac", + .pm = pm_ptr(&ingenic_mac_pm_ops), + .of_match_table = ingenic_mac_of_matches, + }, +}; +module_platform_driver(ingenic_mac_driver); + +MODULE_AUTHOR("周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>"); +MODULE_DESCRIPTION("Ingenic SoCs DWMAC specific glue layer"); +MODULE_LICENSE("GPL v2"); -- 2.7.4 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3 2/2] net: stmmac: Add Ingenic SoCs MAC support. 2021-06-14 17:15 ` [PATCH v3 2/2] net: stmmac: Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) @ 2021-06-14 17:36 ` Andrew Lunn 0 siblings, 0 replies; 12+ messages in thread From: Andrew Lunn @ 2021-06-14 17:36 UTC (permalink / raw) To: 周琰杰 (Zhou Yanjie) Cc: davem, kuba, robh+dt, peppe.cavallaro, alexandre.torgue, joabreu, mcoquelin.stm32, matthias.bgg, alexandre.torgue, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, linux-mediatek, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou On Tue, Jun 15, 2021 at 01:15:37AM +0800, 周琰杰 (Zhou Yanjie) wrote: > Add support for Ingenic SoC MAC glue layer support for the stmmac > device driver. This driver is used on for the MAC ethernet controller > found in the JZ4775 SoC, the X1000 SoC, the X1600 SoC, the X1830 SoC, > and the X2000 SoC. > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 0/2] Add Ingenic SoCs MAC support. 2021-06-14 17:15 [PATCH v3 0/2] Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) 2021-06-14 17:15 ` [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie) 2021-06-14 17:15 ` [PATCH v3 2/2] net: stmmac: Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) @ 2021-06-14 20:20 ` patchwork-bot+netdevbpf 2021-06-15 23:03 ` Rob Herring 2 siblings, 1 reply; 12+ messages in thread From: patchwork-bot+netdevbpf @ 2021-06-14 20:20 UTC (permalink / raw) To: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSkgPHpob3V5YW5qaWVAd2FueWVldGVjaC5j?=, =?utf-8?b?b20+?= Cc: davem, kuba, robh+dt, peppe.cavallaro, alexandre.torgue, joabreu, mcoquelin.stm32, matthias.bgg, alexandre.torgue, netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel, linux-mediatek, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou Hello: This series was applied to netdev/net-next.git (refs/heads/master): On Tue, 15 Jun 2021 01:15:35 +0800 you wrote: > v2->v3: > 1.Add "ingenic,mac.yaml" for Ingenic SoCs. > 2.Change tx clk delay and rx clk delay from hardware value to ps. > 3.return -EINVAL when a unsupported value is encountered when > parsing the binding. > 4.Simplify the code of the RGMII part of X2000 SoC according to > Andrew Lunn’s suggestion. > 5.Follow the example of "dwmac-mediatek.c" to improve the code > that handles delays according to Andrew Lunn’s suggestion. > > [...] Here is the summary with links: - [v3,1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. https://git.kernel.org/netdev/net-next/c/3b8401066e5a - [v3,2/2] net: stmmac: Add Ingenic SoCs MAC support. https://git.kernel.org/netdev/net-next/c/2bb4b98b60d7 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 0/2] Add Ingenic SoCs MAC support. 2021-06-14 20:20 ` [PATCH v3 0/2] " patchwork-bot+netdevbpf @ 2021-06-15 23:03 ` Rob Herring 0 siblings, 0 replies; 12+ messages in thread From: Rob Herring @ 2021-06-15 23:03 UTC (permalink / raw) To: patchwork-bot+netdevbpf, David Miller, Jakub Kicinski Cc: Giuseppe CAVALLARO, Alexandre Torgue, Jose Abreu, Maxime Coquelin, Matthias Brugger, Alexandre Torgue, netdev, devicetree, linux-kernel, moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel, moderated list:ARM/Mediatek SoC support, dongsheng.qiu, aric.pzqi, rick.tyliu, sihui.liu, jun.jiang, sernia.zhou, 周琰杰 (Zhou Yanjie) On Mon, Jun 14, 2021 at 2:20 PM <patchwork-bot+netdevbpf@kernel.org> wrote: > > Hello: > > This series was applied to netdev/net-next.git (refs/heads/master): > > On Tue, 15 Jun 2021 01:15:35 +0800 you wrote: > > v2->v3: > > 1.Add "ingenic,mac.yaml" for Ingenic SoCs. > > 2.Change tx clk delay and rx clk delay from hardware value to ps. > > 3.return -EINVAL when a unsupported value is encountered when > > parsing the binding. > > 4.Simplify the code of the RGMII part of X2000 SoC according to > > Andrew Lunn’s suggestion. > > 5.Follow the example of "dwmac-mediatek.c" to improve the code > > that handles delays according to Andrew Lunn’s suggestion. > > > > [...] > > Here is the summary with links: > - [v3,1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs. > https://git.kernel.org/netdev/net-next/c/3b8401066e5a > - [v3,2/2] net: stmmac: Add Ingenic SoCs MAC support. > https://git.kernel.org/netdev/net-next/c/2bb4b98b60d7 Perhaps 3 hours is not sufficient time to review. It may be a v3, but the binding appears to have changed quite a bit in addition to being broken. Rob ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-06-18 19:50 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-06-14 17:15 [PATCH v3 0/2] Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) 2021-06-14 17:15 ` [PATCH v3 1/2] dt-bindings: dwmac: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie) 2021-06-14 17:36 ` Andrew Lunn 2021-06-15 14:04 ` Rob Herring 2021-06-15 23:05 ` Rob Herring 2021-06-16 7:45 ` 周琰杰 2021-06-17 3:24 ` 周琰杰 2021-06-18 19:50 ` Rob Herring 2021-06-14 17:15 ` [PATCH v3 2/2] net: stmmac: Add Ingenic SoCs MAC support 周琰杰 (Zhou Yanjie) 2021-06-14 17:36 ` Andrew Lunn 2021-06-14 20:20 ` [PATCH v3 0/2] " patchwork-bot+netdevbpf 2021-06-15 23:03 ` Rob Herring
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