From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: tsbogend@alpha.franken.de, paul@crapouillou.net, robh+dt@kernel.org
Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com,
aric.pzqi@ingenic.com, rick.tyliu@ingenic.com,
sihui.liu@ingenic.com, jun.jiang@ingenic.com,
sernia.zhou@foxmail.com
Subject: [PATCH 0/4] Misc Ingenic patches.
Date: Tue, 22 Jun 2021 15:37:21 +0800 [thread overview]
Message-ID: <1624347445-88070-1-git-send-email-zhouyanjie@wanyeetech.com> (raw)
Some misc patches that don't really have any relation
between themselves.
周琰杰 (Zhou Yanjie) (4):
MIPS: X1830: Respect cell count of common properties.
MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
MIPS: GCW0: Adjust pinctrl related code in device tree.
MIPS: CI20: Reduce MSC0 frequency and add second percpu timer for SMP.
arch/mips/boot/dts/ingenic/ci20.dts | 23 ++++++++++++-----------
arch/mips/boot/dts/ingenic/gcw0.dts | 2 +-
arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++
arch/mips/boot/dts/ingenic/x1830.dtsi | 16 +++++++++++-----
4 files changed, 31 insertions(+), 17 deletions(-)
--
2.7.4
next reply other threads:[~2021-06-22 7:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-22 7:37 周琰杰 (Zhou Yanjie) [this message]
2021-06-22 7:37 ` [PATCH 1/4] MIPS: X1830: Respect cell count of common properties 周琰杰 (Zhou Yanjie)
2021-06-22 12:30 ` Paul Cercueil
2021-06-22 7:37 ` [PATCH 2/4] MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-06-22 12:31 ` Paul Cercueil
2021-06-22 7:37 ` [PATCH 3/4] MIPS: GCW0: Adjust pinctrl related code in device tree 周琰杰 (Zhou Yanjie)
2021-06-22 12:46 ` Paul Cercueil
2021-06-22 13:51 ` 周琰杰
2021-06-22 14:05 ` Paul Cercueil
2021-06-22 14:41 ` 周琰杰
2021-06-22 7:37 ` [PATCH 4/4] MIPS: CI20: Reduce MSC0 frequency and add second percpu timer for SMP 周琰杰 (Zhou Yanjie)
2021-06-22 12:39 ` Paul Cercueil
2021-06-22 13:55 ` 周琰杰
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