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From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: tsbogend@alpha.franken.de, mturquette@baylibre.com,
	sboyd@kernel.org, paul@crapouillou.net, robh+dt@kernel.org
Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com,
	rick.tyliu@ingenic.com, sihui.liu@ingenic.com,
	jun.jiang@ingenic.com, sernia.zhou@foxmail.com
Subject: [PATCH v4 3/5] MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
Date: Sat, 26 Jun 2021 14:18:39 +0800	[thread overview]
Message-ID: <1624688321-69131-4-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com>

Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
---

Notes:
    v1->v2:
    No change.
    
    v2->v3:
    No change.
    
    v3->v4:
    No change.

 arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++
 arch/mips/boot/dts/ingenic/x1830.dtsi | 7 +++++++
 2 files changed, 14 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi
index aac9ded..dec7909 100644
--- a/arch/mips/boot/dts/ingenic/x1000.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1000.dtsi
@@ -80,6 +80,11 @@
 
 			status = "disabled";
 		};
+
+		mac_phy_ctrl: mac-phy-ctrl@e8 {
+			compatible = "syscon";
+			reg = <0xe8 0x4>;
+		};
 	};
 
 	ost: timer@12000000 {
@@ -347,6 +352,8 @@
 		clocks = <&cgu X1000_CLK_MAC>;
 		clock-names = "stmmaceth";
 
+		mode-reg = <&mac_phy_ctrl>;
+
 		status = "disabled";
 
 		mdio: mdio {
diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi
index 59ca3a8..215257f 100644
--- a/arch/mips/boot/dts/ingenic/x1830.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1830.dtsi
@@ -73,6 +73,11 @@
 
 			status = "disabled";
 		};
+
+		mac_phy_ctrl: mac-phy-ctrl@e8 {
+			compatible = "syscon";
+			reg = <0xe8 0x4>;
+		};
 	};
 
 	ost: timer@12000000 {
@@ -336,6 +341,8 @@
 		clocks = <&cgu X1830_CLK_MAC>;
 		clock-names = "stmmaceth";
 
+		mode-reg = <&mac_phy_ctrl>;
+
 		status = "disabled";
 
 		mdio: mdio {
-- 
2.7.4


  parent reply	other threads:[~2021-06-26  6:19 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-26  6:18 [PATCH v4 0/5] Misc Ingenic patches 周琰杰 (Zhou Yanjie)
2021-06-26  6:18 ` [PATCH v4 1/5] MIPS: X1830: Respect cell count of common properties 周琰杰 (Zhou Yanjie)
2021-06-26  6:18 ` [PATCH v4 2/5] dt-bindings: clock: Add documentation for MAC PHY control bindings 周琰杰 (Zhou Yanjie)
2021-06-28  2:52   ` Stephen Boyd
2021-06-28  4:46     ` 周琰杰
2021-06-26  6:18 ` 周琰杰 (Zhou Yanjie) [this message]
2021-06-26  6:18 ` [PATCH v4 4/5] MIPS: CI20: Reduce clocksource to 750 kHz 周琰杰 (Zhou Yanjie)
2021-06-30 12:21   ` Paul Cercueil
2021-06-26  6:18 ` [PATCH v4 5/5] MIPS: CI20: Add second percpu timer for SMP 周琰杰 (Zhou Yanjie)
2021-06-30 12:24   ` Paul Cercueil
2021-07-02 12:04     ` Zhou Yanjie
2021-06-30 12:37 ` [PATCH v4 0/5] Misc Ingenic patches Thomas Bogendoerfer

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