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From: Stephen Boyd <sboyd@kernel.org>
To: Guenter Roeck <linux@roeck-us.net>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org,
	Neil Armstrong <narmstrong@baylibre.com>,
	jbrunet@baylibre.com, khilman@baylibre.com,
	linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/3] clk: divider: Switch from .round_rate to .determine_rate by default
Date: Thu, 01 Jul 2021 17:53:17 -0700	[thread overview]
Message-ID: <162518719742.3570193.6252446967177529304@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <7a06cfaf-4cae-5c4c-edff-16d6406a1b6c@roeck-us.net>

Quoting Guenter Roeck (2021-07-01 14:43:29)
> On 7/1/21 1:57 PM, Martin Blumenstingl wrote:
> > Hi Guenter,
> > 
> > On Thu, Jul 1, 2021 at 10:25 PM Guenter Roeck <linux@roeck-us.net> wrote:
> > [...]
> >> [    0.000000] [<c07be330>] (clk_core_determine_round_nolock) from [<c07c5480>] (clk_core_set_rate_nolock+0x184/0x294)
> >> [    0.000000] [<c07c5480>] (clk_core_set_rate_nolock) from [<c07c55c0>] (clk_set_rate+0x30/0x64)
> >> [    0.000000] [<c07c55c0>] (clk_set_rate) from [<c163c310>] (imx6ul_clocks_init+0x2798/0x2a44)
> >> [    0.000000] [<c163c310>] (imx6ul_clocks_init) from [<c162a4e4>] (of_clk_init+0x180/0x26c)
> >> [    0.000000] [<c162a4e4>] (of_clk_init) from [<c1604d34>] (time_init+0x20/0x30)
> >> [    0.000000] [<c1604d34>] (time_init) from [<c1600e0c>] (start_kernel+0x4c8/0x6cc)
> >> [    0.000000] [<c1600e0c>] (start_kernel) from [<00000000>] (0x0)
> >> [    0.000000] Code: bad PC value
> >> [    0.000000] ---[ end trace 7009a0f298fd39e9 ]---
> >> [    0.000000] Kernel panic - not syncing: Attempted to kill the idle task!
> >>
> >> Bisct points to this patch as culprit. Reverting it fixes the problem.
> > sorry for breaking imx6 - and at the same time: thanks for reporting this!
> > 
> > Do you have some additional information about this crash (which clock
> > this relates to, file and line number, etc.)?
> > I am struggling to understand the cause of this NULL dereference
> > My patch doesn't change the clk_core_determine_round_nolock()
> > implementation and the new determine_rate code-path (inside that
> > function) doesn't seem to be more fragile in terms of NULL values
> > compared to the round_rate code-path.
> > Instead I think it's more likely that the problem is somewhere within
> > clk_divider_determine_rate() (or in any helper function it uses), but
> > that doesn't show up in the trace
> > 
> > I don't have any imx6 board myself and so far I am unable to reproduce
> > this crash on any hardware I have.
> > However, if it's a problem in my clk-divider.c changes then I'd like
> > to find the cause (ASAP) because possibly more SoCs may be broken...
> > 
> 
> I don't have such a board either. The problem shows up in my qemu boot tests. See
> https://kerneltests.org/builders/qemu-arm-v7-next/builds/38/steps/qemubuildcommand/logs/stdio
> for an example. The problem reproduces with qemu's mcimx6ul-evk and sabrelite
> emulations.
> 

Would be great if we had some kunit tests for the divider code. No doubt
it would have caught this. I think for now I'll just drop this patch
from clk-next. Thanks for testing.

  reply	other threads:[~2021-07-02  0:53 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-27 22:39 [PATCH v3 0/3] clk: meson: rounding for fast clocks on 32-bit SoCs Martin Blumenstingl
2021-06-27 22:39 ` [PATCH v3 1/3] clk: divider: Add re-usable determine_rate implementations Martin Blumenstingl
2021-06-30 18:39   ` Stephen Boyd
2021-06-27 22:39 ` [PATCH v3 2/3] clk: divider: Switch from .round_rate to .determine_rate by default Martin Blumenstingl
2021-06-30 18:39   ` Stephen Boyd
2021-07-01 20:25   ` Guenter Roeck
2021-07-01 20:57     ` Martin Blumenstingl
2021-07-01 21:43       ` Guenter Roeck
2021-07-02  0:53         ` Stephen Boyd [this message]
2021-07-02  1:02       ` Stephen Boyd
2021-07-02  9:19         ` Martin Blumenstingl
     [not found]           ` <CGME20210702124612eucas1p1762911deb37e4fb03adc9239bb715135@eucas1p1.samsung.com>
2021-07-02 12:46             ` Marek Szyprowski
2021-07-02 21:00               ` Stephen Boyd
2021-07-02 20:59           ` Stephen Boyd
2021-07-02 22:57             ` Martin Blumenstingl
2021-07-02  1:04   ` Stephen Boyd
2021-06-27 22:39 ` [PATCH v3 3/3] clk: meson: regmap: switch to determine_rate for the dividers Martin Blumenstingl
2021-06-30 18:39   ` Stephen Boyd

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