From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B77C6C07E98 for ; Mon, 5 Jul 2021 07:53:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A02CE613F7 for ; Mon, 5 Jul 2021 07:53:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230215AbhGEH4Y (ORCPT ); Mon, 5 Jul 2021 03:56:24 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:59130 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230148AbhGEH4T (ORCPT ); Mon, 5 Jul 2021 03:56:19 -0400 Date: Mon, 05 Jul 2021 07:53:41 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1625471622; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=byxpdXjlUnfnX9QRcr+gD1o09MU8W6pkKF1/gfGwIag=; b=nXFBUeG1RzM/QzlKYvOsE6PosfAi8Ex/DJ42zwu9KhnpalGpQSpOERHAKMzDf3D3TnxKHD U02LlNP1uj30ADC1o67tfz8gca+VK5oY7w16jv0AY1qpjUJ/iWEgmD0GIxjGkgFBc9x14N vu+kCa6HL7WF43O7hk0BGLEvqHAod2DfpAJ0/3eg1f80Yfiw2rc/nArloyOYx6gHNPzkcc S3Qwp0dm5ZskCL0B5Vr6s53i16JKWGj/E6IFt1k7RfDb8jUi0UHjsPE1KDjVq/94cOIs6U Ydm8+o1UAqu3gKeiti8QD6/KEQIt5IvmRrmaSMrywvvTnYQ/p93IEaXFTFPy1w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1625471622; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=byxpdXjlUnfnX9QRcr+gD1o09MU8W6pkKF1/gfGwIag=; b=WfKS3omXbfi/8UBzaNN7PylcEwujuzftwQ+GKohq1GjxVN7W3JCiYIWC9xeLSmLxlLR+6y 8AwLl6iUFYYDkEAA== From: "tip-bot2 for Kan Liang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf/x86/intel/uncore: Add Sapphire Rapids server M3UPI support Cc: Kan Liang , "Peter Zijlstra (Intel)" , Andi Kleen , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <1625087320-194204-11-git-send-email-kan.liang@linux.intel.com> References: <1625087320-194204-11-git-send-email-kan.liang@linux.intel.com> MIME-Version: 1.0 Message-ID: <162547162143.395.417308823668991627.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the perf/core branch of tip: Commit-ID: 2a8e51eae7c83c29795622cfc794cf83436cc05d Gitweb: https://git.kernel.org/tip/2a8e51eae7c83c29795622cfc794cf83436cc05d Author: Kan Liang AuthorDate: Wed, 30 Jun 2021 14:08:34 -07:00 Committer: Peter Zijlstra CommitterDate: Fri, 02 Jul 2021 15:58:40 +02:00 perf/x86/intel/uncore: Add Sapphire Rapids server M3UPI support M3 Intel UPI is the interface between the mesh and the Intel UPI link layer. It is responsible for translating between the mesh protocol packets and the flits that are used for transmitting data across the Intel UPI interface. The layout of the control registers for a M3UPI uncore unit is similar to a UPI uncore unit. Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Andi Kleen Link: https://lore.kernel.org/r/1625087320-194204-11-git-send-email-kan.liang@linux.intel.com --- arch/x86/events/intel/uncore_snbep.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 20045ba..14b9b23 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -5703,6 +5703,11 @@ static struct intel_uncore_type spr_uncore_upi = { .name = "upi", }; +static struct intel_uncore_type spr_uncore_m3upi = { + SPR_UNCORE_PCI_COMMON_FORMAT(), + .name = "m3upi", +}; + #define UNCORE_SPR_NUM_UNCORE_TYPES 12 static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { @@ -5715,7 +5720,7 @@ static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { &spr_uncore_imc, &spr_uncore_m2m, &spr_uncore_upi, - NULL, + &spr_uncore_m3upi, NULL, NULL, };