From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, jmattson@google.com, seanjc@google.com,
vkuznets@redhat.com, wei.w.wang@intel.com,
like.xu.linux@gmail.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Sean Christopherson <sean.j.christopherson@intel.com>,
Yang Weijiang <weijiang.yang@intel.com>
Subject: [PATCH v6 08/12] KVM: x86: Report XSS as an MSR to be saved if there are supported features
Date: Fri, 16 Jul 2021 16:50:02 +0800 [thread overview]
Message-ID: <1626425406-18582-9-git-send-email-weijiang.yang@intel.com> (raw)
In-Reply-To: <1626425406-18582-1-git-send-email-weijiang.yang@intel.com>
From: Sean Christopherson <sean.j.christopherson@intel.com>
Add MSR_IA32_XSS to the list of MSRs reported to userspace if
supported_xss is non-zero, i.e. KVM supports at least one XSS based
feature.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20210203113421.5759-2-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
arch/x86/kvm/x86.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 5f2e13c9f507..c225260c949e 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1299,6 +1299,7 @@ static const u32 msrs_to_save_all[] = {
MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
MSR_ARCH_LBR_CTL, MSR_ARCH_LBR_DEPTH,
+ MSR_IA32_XSS,
};
static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
@@ -6058,6 +6059,10 @@ static void kvm_init_msr_list(void)
if (!kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR))
continue;
break;
+ case MSR_IA32_XSS:
+ if (!supported_xss)
+ continue;
+ break;
default:
break;
}
--
2.21.1
next prev parent reply other threads:[~2021-07-16 8:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-16 8:49 [PATCH v6 00/12] Introduce Architectural LBR for vPMU Yang Weijiang
2021-07-16 8:49 ` [PATCH v6 01/12] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2021-07-16 8:49 ` [PATCH v6 02/12] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2021-07-16 8:49 ` [PATCH v6 03/12] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2021-07-16 8:49 ` [PATCH v6 04/12] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2021-07-16 23:33 ` Jim Mattson
2021-07-19 7:27 ` Yang Weijiang
2021-07-16 8:49 ` [PATCH v6 05/12] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2021-07-16 8:50 ` [PATCH v6 06/12] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2021-07-16 8:50 ` [PATCH v6 07/12] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2021-07-16 8:50 ` Yang Weijiang [this message]
2021-07-16 8:50 ` [PATCH v6 09/12] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2021-07-16 8:50 ` [PATCH v6 10/12] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2021-07-16 8:50 ` [PATCH v6 11/12] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2021-07-16 8:50 ` [PATCH v6 12/12] KVM: x86/cpuid: Advise Arch LBR feature in CPUID Yang Weijiang
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