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From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	Fabien Parent <fparent@baylibre.com>,
	Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Hsin-Yi Wang <hsinyi@chromium.org>
Subject: [PATCH v6, 2/3] arm64: dts: mt8192: add gce node
Date: Mon, 2 Aug 2021 15:46:04 +0800	[thread overview]
Message-ID: <1627890365-22992-3-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1627890365-22992-1-git-send-email-yongqiang.niu@mediatek.com>

add gce node for mt8192

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 6b22441..c8472c6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include <dt-bindings/clock/mt8192-clk.h>
+#include <dt-bindings/gce/mt8192-gce.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
@@ -517,6 +518,15 @@
 			clock-names = "clk13m";
 		};
 
+		gce: mailbox@10228000 {
+			compatible = "mediatek,mt8192-gce";
+			reg = <0 0x10228000 0 0x4000>;
+			interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
+			#mbox-cells = <3>;
+			clocks = <&infracfg CLK_INFRA_GCE>;
+			clock-names = "gce";
+		};
+
 		scp_adsp: clock-controller@10720000 {
 			compatible = "mediatek,mt8192-scp_adsp";
 			reg = <0 0x10720000 0 0x1000>;
-- 
1.8.1.1.dirty


  parent reply	other threads:[~2021-08-02  7:46 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02  7:46 [PATCH v6 0/3] support gce on mt8192 platform Yongqiang Niu
2021-08-02  7:46 ` [PATCH v6, 1/3] dt-binding: gce: add gce header file for mt8192 Yongqiang Niu
2021-08-02  7:46 ` Yongqiang Niu [this message]
2021-08-02  7:46 ` [PATCH v6, 3/3] mailbox: cmdq: add mt8192 support Yongqiang Niu
2021-09-01  6:40 ` [PATCH v6 0/3] support gce on mt8192 platform Chen-Yu Tsai

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