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From: Stephen Boyd <sboyd@kernel.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Iskren Chernev <iskren.chernev@gmail.com>
Cc: Andy Gross <agross@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	phone-devel@vger.kernel.org,
	~postmarketos/upstreaming@lists.sr.ht,
	Iskren Chernev <iskren.chernev@gmail.com>
Subject: Re: [PATCH v3 1/2] dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
Date: Mon, 02 Aug 2021 15:21:02 -0700	[thread overview]
Message-ID: <162794286285.714452.14111966516954708252@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20210801103448.3329333-2-iskren.chernev@gmail.com>

Quoting Iskren Chernev (2021-08-01 03:34:47)
> Add device tree bindings for global clock controller on SM6115 and
> SM4250 SoCs (pin and software compatible).
> 
> Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
> ---
>  .../bindings/clock/qcom,gcc-sm6115.yaml       |  74 +++++++
>  include/dt-bindings/clock/qcom,gcc-sm6115.h   | 201 ++++++++++++++++++
>  2 files changed, 275 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,gcc-sm6115.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml
> new file mode 100644
> index 000000000000..c8c9eb82b9b4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Global Clock & Reset Controller Binding for SM6115 and SM4250
> +
> +maintainers:
> +  - Iskren Chernev <iskren.chernev@gmail.com>
> +
> +description: |
> +  Qualcomm global clock control module which supports the clocks, resets and
> +  power domains on SM4250/6115.
> +
> +  See also:
> +  - dt-bindings/clock/qcom,gcc-sm6115.h
> +
> +properties:
> +  compatible:
> +    const: qcom,gcc-sm6115
> +
> +  clocks:
> +    items:
> +      - description: Board XO source
> +      - description: Sleep clock source
> +      - description: PLL test clock source (Optional clock)

Please drop this last one

> +
> +  clock-names:
> +    items:
> +      - const: bi_tcxo
> +      - const: sleep_clk
> +      - const: core_bi_pll_test_se # Optional clock

And this last one. The test input is never used. I'd make this the same
as gcc-sc7180, i.e. have the always on XO as an input in case it is
needed.

> +
> +  '#clock-cells':
> +    const: 1

  parent reply	other threads:[~2021-08-02 22:21 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-01 10:34 [PATCH v3 0/2] Add GCC for SM4250/6115 Iskren Chernev
2021-08-01 10:34 ` [PATCH v3 1/2] dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC Iskren Chernev
2021-08-02 13:39   ` Rob Herring
2021-08-02 22:21   ` Stephen Boyd [this message]
2021-08-01 10:34 ` [PATCH v3 2/2] clk: qcom: Add Global Clock controller (GCC) driver for SM6115 Iskren Chernev
2021-08-01 16:20   ` Konrad Dybcio
2021-08-02 22:23     ` Stephen Boyd

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