From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 509B4C4338F for ; Mon, 9 Aug 2021 03:08:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 36D3660FD8 for ; Mon, 9 Aug 2021 03:08:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232847AbhHIDJQ (ORCPT ); Sun, 8 Aug 2021 23:09:16 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:44912 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232804AbhHIDJF (ORCPT ); Sun, 8 Aug 2021 23:09:05 -0400 X-UUID: 48606c964f6e4a71ae7f57959fe9ea73-20210809 X-UUID: 48606c964f6e4a71ae7f57959fe9ea73-20210809 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1915852948; Mon, 09 Aug 2021 11:08:42 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 9 Aug 2021 11:08:39 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 9 Aug 2021 11:08:39 +0800 From: Nina Wu CC: Rob Herring , Matthias Brugger , Nina Wu , Neal Liu , Zhen Lei , , , , , , , Subject: [v4 7/7] arm64: dts: mt8192: Add devapc node Date: Mon, 9 Aug 2021 11:08:19 +0800 Message-ID: <1628478499-29460-7-git-send-email-nina-cm.wu@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1628478499-29460-1-git-send-email-nina-cm.wu@mediatek.com> References: <1628478499-29460-1-git-send-email-nina-cm.wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Nina Wu Add devapc nodes to mt8192. Signed-off-by: Nina Wu --- This patch depends on "Add dt-bindings of MT8192 clocks" [1] and "Add mt8192 clock controllers" [2] [1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/include/dt-bindings/clock/mt8192-clk.h?h=next-20210806&id=f35f1a23e0e12e3173e9e9dedbc150d139027189 [2] https://patchwork.kernel.org/project/linux-mediatek/patch/20210727023205.20319-2-chun-jie.chen@mediatek.com/ --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 36 ++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 6b22441..accbd07 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -517,6 +517,33 @@ clock-names = "clk13m"; }; + devapc_infra: devapc@10207000 { + compatible = "mediatek,mt8192-devapc"; + reg = <0 0x10207000 0 0x1000>; + vio-idx-num = <367>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_DEVICE_APC>; + clock-names = "devapc-infra-clock"; + }; + + devapc_peri: devapc@10274000 { + compatible = "mediatek,mt8192-devapc"; + reg = <0 0x10274000 0 0x1000>; + vio-idx-num = <292>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_DEVICE_APC>; + clock-names = "devapc-infra-clock"; + }; + + devapc_peri2: devapc@10275000 { + compatible = "mediatek,mt8192-devapc"; + reg = <0 0x10275000 0 0x1000>; + vio-idx-num = <242>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_DEVICE_APC>; + clock-names = "devapc-infra-clock"; + }; + scp_adsp: clock-controller@10720000 { compatible = "mediatek,mt8192-scp_adsp"; reg = <0 0x10720000 0 0x1000>; @@ -661,6 +688,15 @@ status = "disabled"; }; + devapc_peri_par: devapc@11020000 { + compatible = "mediatek,mt8192-devapc"; + reg = <0 0x11020000 0 0x1000>; + vio-idx-num = <58>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_DEVICE_APC>; + clock-names = "devapc-infra-clock"; + }; + nor_flash: spi@11234000 { compatible = "mediatek,mt8192-nor"; reg = <0 0x11234000 0 0xe0>; -- 2.6.4