From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56AA2C432BE for ; Tue, 10 Aug 2021 09:08:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3939A6109F for ; Tue, 10 Aug 2021 09:08:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238735AbhHJJIe (ORCPT ); Tue, 10 Aug 2021 05:08:34 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:41876 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238610AbhHJJIJ (ORCPT ); Tue, 10 Aug 2021 05:08:09 -0400 Date: Tue, 10 Aug 2021 09:07:45 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1628586466; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=towpk5A8eToUKr08Ctl4hG917wxhPOK70OYxWFFjB+I=; b=bkIo4Car8qS7DVdHadq8/6iUcwG+AOlXOxLT/q9E+IiXst2FMNyYaWQqY8Ikk61wHJbEWY mRwgnxLmQw0G1qnlElR7ONVSYoddgt/AJYVAenvwYRsFR6BtsG0jlEXDpEj/yk6C5j0EdU QR5qce52aGU2/V9ABcRttv13BvPQqWfodQ/3f5gUaTRGqC8EUlEAfRNuv16NEuVDU4MpAT e+dL59W3fm8elJElPBPIFKBT5kWPkxS0l/Bn9cI3ibcZXf1W2BGxl+aLDwmsR0E8wAICYk dT3+pDam2IXE3So8b19pJWdBYXugUXQEeO0E+kZ+6M4m2Lc2GvJAdlQll+PrKQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1628586466; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=towpk5A8eToUKr08Ctl4hG917wxhPOK70OYxWFFjB+I=; b=3sbKYBwu4UyqX3LjmrO3iEqsyDxBmx7iUF6hW8yxNTOw2QH4hOn69p1mAqQVOla6CigtAv e4NWBKXwgrbOXpAA== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] PCI/MSI: Do not set invalid bits in MSI mask Cc: Thomas Gleixner , Marc Zyngier , stable@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20210729222542.568173099@linutronix.de> References: <20210729222542.568173099@linutronix.de> MIME-Version: 1.0 Message-ID: <162858646546.395.2579640768896644198.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the irq/core branch of tip: Commit-ID: 361fd37397f77578735907341579397d5bed0a2d Gitweb: https://git.kernel.org/tip/361fd37397f77578735907341579397d5bed0a2d Author: Thomas Gleixner AuthorDate: Thu, 29 Jul 2021 23:51:44 +02:00 Committer: Thomas Gleixner CommitterDate: Tue, 10 Aug 2021 10:59:20 +02:00 PCI/MSI: Do not set invalid bits in MSI mask msi_mask_irq() takes a mask and a flags argument. The mask argument is used to mask out bits from the cached mask and the flags argument to set bits. Some places invoke it with a flags argument which sets bits which are not used by the device, i.e. when the device supports up to 8 vectors a full unmask in some places sets the mask to 0xFFFFFF00. While devices probably do not care, it's still bad practice. Fixes: 7ba1930db02f ("PCI MSI: Unmask MSI if setup failed") Signed-off-by: Thomas Gleixner Tested-by: Marc Zyngier Reviewed-by: Marc Zyngier Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210729222542.568173099@linutronix.de --- drivers/pci/msi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 434c704..e27ac6b 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -656,21 +656,21 @@ static int msi_capability_init(struct pci_dev *dev, int nvec, /* Configure MSI capability structure */ ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); if (ret) { - msi_mask_irq(entry, mask, ~mask); + msi_mask_irq(entry, mask, 0); free_msi_irqs(dev); return ret; } ret = msi_verify_entries(dev); if (ret) { - msi_mask_irq(entry, mask, ~mask); + msi_mask_irq(entry, mask, 0); free_msi_irqs(dev); return ret; } ret = populate_msi_sysfs(dev); if (ret) { - msi_mask_irq(entry, mask, ~mask); + msi_mask_irq(entry, mask, 0); free_msi_irqs(dev); return ret; } @@ -962,7 +962,7 @@ static void pci_msi_shutdown(struct pci_dev *dev) /* Return the device with MSI unmasked as initial states */ mask = msi_mask(desc->msi_attrib.multi_cap); /* Keep cached state to be restored */ - __pci_msi_desc_mask_irq(desc, mask, ~mask); + __pci_msi_desc_mask_irq(desc, mask, 0); /* Restore dev->irq to its default pin-assertion IRQ */ dev->irq = desc->msi_attrib.default_irq;