From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 379EAC432BE for ; Mon, 23 Aug 2021 18:42:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1AEEB613A5 for ; Mon, 23 Aug 2021 18:42:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231229AbhHWSnK (ORCPT ); Mon, 23 Aug 2021 14:43:10 -0400 Received: from gloria.sntech.de ([185.11.138.130]:54050 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230511AbhHWSnJ (ORCPT ); Mon, 23 Aug 2021 14:43:09 -0400 Received: from dynamic-046-114-139-102.46.114.pool.telefonica.de ([46.114.139.102] helo=phil.sntech) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mIEtp-0002Jl-QA; Mon, 23 Aug 2021 20:42:21 +0200 From: Heiko Stuebner To: Alex Bee Cc: Heiko Stuebner , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring Subject: Re: [PATCH] arm64: dts: rockchip: Fix GPU register width for RK3328 Date: Mon, 23 Aug 2021 20:42:13 +0200 Message-Id: <162974163915.2977894.9290643400538669916.b4-ty@sntech.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210623115926.164861-1-knaerzche@gmail.com> References: <20210623115926.164861-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 23 Jun 2021 13:59:26 +0200, Alex Bee wrote: > As can be seen in RK3328's TRM the register range for the GPU is > 0xff300000 to 0xff330000. > It would (and does in vendor kernel) overlap with the registers of > the HEVC encoder (node/driver do not exist yet in upstream kernel). > See already existing h265e_mmu node. Applied, thanks! [1/1] arm64: dts: rockchip: Fix GPU register width for RK3328 commit: 3f1c9b99f22c4784bd6f439a63bbf8a61c0335b1 Best regards, -- Heiko Stuebner