From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75E01C43214 for ; Mon, 30 Aug 2021 17:55:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5EC1260F3A for ; Mon, 30 Aug 2021 17:55:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238331AbhH3R4L (ORCPT ); Mon, 30 Aug 2021 13:56:11 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:61663 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238291AbhH3R4I (ORCPT ); Mon, 30 Aug 2021 13:56:08 -0400 Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 30 Aug 2021 10:55:14 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 30 Aug 2021 10:55:12 -0700 X-QCInternal: smtphost Received: from c-sanm-linux.qualcomm.com ([10.206.25.31]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Aug 2021 23:24:41 +0530 Received: by c-sanm-linux.qualcomm.com (Postfix, from userid 2343233) id DDD7F3D31; Mon, 30 Aug 2021 23:24:39 +0530 (IST) From: Sandeep Maheswaram To: Rob Herring , Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , Matthias Kaehlcke Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Pratham Pratap , Sandeep Maheswaram Subject: [PATCH 1/3] dt-bindings: usb: qcom,dwc3: Add multi-pd bindings for dwc3 qcom Date: Mon, 30 Aug 2021 23:24:31 +0530 Message-Id: <1630346073-7099-2-git-send-email-sanm@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630346073-7099-1-git-send-email-sanm@codeaurora.org> References: <1630346073-7099-1-git-send-email-sanm@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add multi pd bindings to set performance state for cx domain to maintain minimum corner voltage for USB clocks. Signed-off-by: Sandeep Maheswaram --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index e70afc4..838d9c4 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -41,7 +41,18 @@ properties: power-domains: description: specifies a phandle to PM domain provider node - maxItems: 1 + minItems: 1 + items: + - description: optional,cx power domain + - description: USB gdsc power domain + + power-domain-names: + items: + - const: cx + - const: usb_gdsc + + required-opps: + description: specifies the performance state to cx power domain clocks: description: -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation